Method and system in a data processing system for loading and storing vectors in a plurality of modes

A method in a vector processing system for transferring vectors having a plurality of elements between a register array having N sequentially numbered rows of addressable registers and M sequentially numbered columns of addressable registers for storing said plurality of elements and a memory having addressable storage locations, said method comprising the steps of:

• storing a vector having a plurality of sequentially numbered elements in said register array, said plurality of sequentially numbered elements including both real elements and imaginary elements, wherein said real elements are stored in sequential order in a first one of said M columns and said imaginary elements are stored in sequential order in a second one of said M columns for transfer to a vector register interface unit;
• in response to receipt of at least one address at said register array, transferring, in a first order, said plurality of elements from addressable registers in said register array specified by said at least one address into said vector register interface unit, said transferring step including the step of transferring, in a first order, a plurality of sequentially numbered elements from a selected one of said N rows in said register array into said vector register interface unit;
• and
• transferring said plurality of sequentially numbered elements from said vector register interface unit to said memory such that said plurality of elements are stored in said addressable locations in said memory in one of a plurality of preselected patterns, wherein said step of transferring said plurality of elements from said vector register interface unit to said memory includes the step of transferring said plurality of real and imaginary elements from said vector register interface unit to sequentially numbered locations in said memory such that said real and imaginary elements are alternately stored in said sequentially numbered locations in said memory.