Molded laminate package with integral mold gate

A semiconductor package comprising:

• a substrate having an upper surface, a lower surface and a perimeter;
• a plurality of conductive traces formed on the upper surface;
• a plurality of electrical contacts on the lower surface of the substrate for attachment to a printed wiring board;
• a plurality of conductive vias through the substrate electrically connecting the conductive traces on the upper surface to the electrical contacts on the lower surface;
• a semiconductor die mounted on the upper surface, the semiconductor die in electrical communication with the plurality of traces;
• a molded body formed on the upper surface of the substrate covering the semiconductor die and traces;
• and
• a mold gate runner on the upper surface of the substrate extending from the molded body to the perimeter of the substrate.

A semiconductor package comprising:

• a substrate having an upper surface, a lower surface and a rectangular perimeter with one clipped corner;
• a plurality of conductive traces formed on the upper surface;
• a plurality of electrical contacts on the lower surface of the substrate for attachment to a printed wiring board;
• a plurality of conductive vias through the substrate electrically connecting the conductive traces on the upper surface to the electrical contacts on the lower surface;
• a semiconductor die mounted on the upper surface, the semiconductor die in electrical communication with the plurality of traces;
• a molded body formed on the upper surface of the substrate covering the semiconductor die and traces, the molded body having sloped sides parallel to the edges of the substrate;
• and
• a mold gate runner on the upper surface of the substrate extending from the molded body to the perimeter of the substrate.