Input stage for operational amplifier utilizing phase delay of active load current mirror to achieve improved bandwidth and phase margin
AssigneeNational Semiconductor Corporation
InventorVictor P. Schrader
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AssigneeNational Semiconductor Corporation
InventorVictor P. Schrader
Estimating the term…
In a technique for reducing the transconductance of an input stage of an operational amplifier, the phase delay which the active load current mirror introduces into the single path is utilized in a way such that the phase delay of the overall stage is less than the delay of the primary differential pair. It is a mathematical fact that when two sinusoidal signals of the same frequency are added together, the result is also sinusoidal. Considering two such signals, the second of which has a phase lag with respect to the first, if the two signals are combined by the addition of ordinates, the resulting sinusoid also has a phase lag. However, if the second signal is instead subtracted from the first, then the resulting sinusoid has a phase lead with resect to the first signal. The present invention makes use of this phenomenon by causing the delayed mirror signal to be subtracted from, rather than added to, the primary signal. This produces a differential transconductance stage with less negative phase shift than that of the prior art, in fact less than that of the primary differential pair alone.
A differential stage circuit comprising:
A differential stage circuit comprising:
Dependencies are inferred from the claim text.