Differential source follower with body effect compensation
AssigneeInternational Business Machines Corporation
InventorAnthony R. Bonaccio
Life of this patent
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Abstract
An improved differential source follower with negligible input/output mismatch over a wide range of input signal magnitudes. A pair of FETs and current sources provides bias current control for each differential output that cancels the inherent body-source voltage variation of the source followers which acts to attenuate the unity gain output signal.
Claims16
Apparatus comprising:
- a first and a second FET each receiving a differential input signal and both coupled to a first supply terminal;
- a third and a fourth FET, cross-coupled to the first and the second FET such that the first FET is coupled to the third FET and to a gate of the fourth FET and the second FET is coupled to the fourth FET and to a gate of the third FET;
- a first current source providing a substantially constant current coupled to the first FET in parallel with the third FET;
- a second current source providing a substantially constant current coupled to the second FET in parallel with the fourth FET;
- and
- a first and a second output coupled to the first and second FETs, respectively, for outputting unity gain signals having differential voltage substantially equivalent to the differential input signals.
A differential source follower circuit comprising:
- supply means for coupling the circuit to a power source;
- input means for receiving differential input signals;
- output means, coupled to the input means and to the supply means, for providing unity gain output signals having differential voltage substantially equivalent to the differential input signals;
- and
- correction means coupled to the input means for counteracting a source-body voltage fluctuation in the input means and for maintaining constant a Vgs voltage in the input means.
A differential source follower circuit comprising:
- supply means for coupling the circuit to a power source;
- input means for receiving differential input signals;
- output means, coupled to the input means and to the supply means, for providing unity gain output signals in response to the differential input signals;
- correction means coupled to the input means for counteracting an inherent voltage fluctuation in the input means which attenuates the unity gain output signals;
- and
- wherein the correction means comprises a low power means for shutting off bias currents flowing through the output means.
A differential source follower circuit comprising:
- supply means for coupling the circuit to a power source;
- input means for receiving differential input signals;
- output means, coupled to the input means and to the supply means, for providing unity gain output signals in response to the differential input signals;
- correction means coupled to the input means for counteracting an inherent voltage fluctuation in the input means which attenuates the unity gain output signals;
- wherein the output means comprises first and second FETs, each receiving one of the differential input signals, and the correction means comprises:
- third and fourth FETs, coupled in series to the first and second FETs, respectively, for turning off bias currents flowing through the first and second FETs in response to control signals applied to the third and fourth FETs;
- fifth and sixth FETs cross-coupled to the third and fourth FETs for receiving modulation signals from the first and second FETs;
- and
- first and second current sources coupled to, and for drawing bias currents through, the first and second FETs, respectively, the bias currents modulated by the fifth and sixth FETs.
A differential follower circuit comprising:
- input/output means, coupled to a first voltage terminal, for receiving differential input signals and for providing unity gain output signals having differential voltage substantially equivalent to the differential input signals;
- and
- correction means, coupled to the input/output means and to a second voltage terminal, for compensating a source-body voltage fluctuation in the input/output means such that an output-to-input signal mismatch of the circuit is less than about 1% for differential input signal levels between about -600 mV and about +600 mV.
Apparatus comprising:
- a first FET and a second FET, both coupled to a supply terminal, for receiving a differential input signal and for providing a differential output signal having differential voltage substantially equivalent to the differential input signal;
- a third FET and a fourth FET, the third FET coupled to the first FET and the fourth FET coupled to the second FET;
- a fifth FET and a sixth FET, cross-coupled to the third and the fourth FET, such that the third FET is coupled to the fifth FET and to a gate of the sixth FET and the fourth FET is coupled to the sixth FET and to a gate of the fifth FET;
- a seventh FET and an eighth FET, the seventh FET coupled to the third FET in parallel with the fifth FET and the eighth FET coupled to the fourth FET in parallel with the sixth FET;
- and
- a pair of inputs for selectively turning off a bias current supplied to the first and second FETs, one of the inputs coupled to the third and fourth FETs and another of the inputs coupled to the seventh and eighth FETs.
A method of improving input-to-output mismatch in a differential source follower circuit comprising the steps of:
- (a) providing a transistor-and-current source combination for each differential output of the circuit for modulating the source-body voltage fluctuation in a a source follower associated with said each differential output of the circuit and maintaining its Vgs substantially constant, including applying a modulation signal to a transistor in a first transistor-and-current source combination;
- (b) providing a differential output associated with a first source follower to the transistor in the first transistor-and-current source combination as the modulation signal;
- and
- (c) counteracting said source-body voltage fluctuation in a second source follower and maintaining its Vgs substantially constant, including modulating an amount of current drawn by a current source in the first transistor-and-current source combination through the second source follower of the circuit in response to the modulation signal.
A method of providing a differential unity gain input buffer circuit producing an output signal differential voltage substantially equivalent to an input signal differential voltage, the method comprising the steps of:
- (a) coupling a first differential output of the input buffer circuit to a bias current control circuit which is coupled to a second differential output of the input buffer circuit;
- and
- (b) modulating a drain current flowing through said second differential output with the bias current control circuit in response to output signals supplied by said first differential output.
Dependencies are inferred from the claim text.