Programmable down-sampler having plural decimators and modulator using same

A method for computing a down-sampler having a plurality of decimators cascaded in series, comprising the steps of:

• receiving an input data;
• routing the input data to an output terminal thereby bypassing the plurality of decimators, if no decimation is desired;
• decimating by a factor of two by routing the input data through a last decimator in the plurality of decimators, the last decimator having a wide passband decimation filter;
• and
• decimating by a factor of four by routing the input data through a next to the last decimator in the plurality of decimators, the next to the last decimator having a narrow passband decimation filter.

A demodulator including a two-inputs-two-outputs (TITO) programmable down-sampler, comprising:

• a first mux having a pair of first inputs for receiving a first input signal and a second input signal, a pair of second inputs, a control input, a pair of outputs for generating a decimated quadrature output signal and a decimated in-phase output signal;
• a first two-fold decimator having a pair of outputs coupled to the pair of second inputs of the first mux and having a pair of inputs;
• a second mux having a pair of first inputs for receiving the first input signal and the second input signal, a pair of second inputs, a control input, a pair of outputs coupled to the pair of inputs of the first two-fold decimator;
• a second two-fold decimator having a pair of outputs coupled to the pair of second inputs of the second mux and having a pair of inputs;
• wherein a first control signal is coupled to the control input of the first mux to activate the pair of first inputs of the first mux for routing the first input signal and the second input signal directly to the pair of outputs of the first mux if no decimation is desired, a second control signal being coupled to the control input of the second mux to activate the pair of first inputs of the second mux for receiving the first input signal and the second input signal and the first control signal activating the pair of second inputs of the first mux which are coupled to the pair of outputs of the first two-fold decimator if a decimation by a factor of 2 is desired.

A method for generating a variable-rate TITO decimation, comprising the steps of:

• receiving a pair of input signals containing a quadrature signal and an in-phase signal;
• bypassing a decimation circuit including a plurality of decimators if no decimation is desired;
• decimating by a factor of two by routing the quadrature signal and the in-phase signal through a last decimator that has a wide passband decimation filter;
• and
• decimating by a factor of four by routing the quadrature signal and the in-phase signal through a next to the last decimator that has a narrow passband decimation filter.