Successive approximation type analog to digital converter with repetitive conversion cycles

The successive approximation analog-to-digital converter operable repetitively to perform a series of conversion cycles and including:

• comparator means connected for receiving an analog input signal and operable in each such conversion cycle to produce digital data that has a first value when the input signal value is greater than a comparison value and that otherwise has a second value, the comparison value being dependent upon a trial signal value determined by the converter for use in the cycle concerned;
• and
• successive approximation means operable in each conversion cycle to adjust said trial signal value in dependence upon said digital data produced in the cycle concerned so as to tend to bring that value into closer correspondence with said input signal value;
• wherein at least one conversion cycle of said series is a correction cycle in which the comparator means are operated more than once so that respective first and second comparisons are performed in the correction cycle, and said successive approximation means are operable in the correction cycle to employ the digital data produced respectively by the first and second comparisons when adjusting said trial signal value.

The successive approximation analog-to-digital conversion method, for producing a digital signal that corresponds to an analog input signal, including a series of conversion cycles, each conversion cycle comprising the steps of:

• making a comparison between the input signal value and a comparison value and producing digital data that has a first value when the input signal value is greater than the comparison value and that otherwise has a second value, the comparison value being dependent upon a trial signal value determined for use in the cycle concerned;
• and
• adjusting said trial signal value in dependence upon said digital data produced in the cycle concerned so as to tend to bring that value into closer correspondence with said input signal value;
• wherein at least one conversion cycle is a correction cycle in which respective first and second such comparisons are made and in which the digital data produced respectively by the first and second comparisons is employed when adjusting said trial signal value.