Distortion compensation for a capacitively loaded follower
AssigneeU.S. Philips Corporation
InventorPieter Vorenkamp
Life of this patent
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Abstract
The odd harmonic distortion components in the output signal of a capacitively loaded follower transistor is reduced by means of an additional transistor inserted between the emitter of the follower transistor and the bias current source of the follower transistor. A second follower transistor receives the same input signal as the follower transistor and has its emitter coupled to the emitter of the additional transistor via a compensation capacitor. The current through the compensation capacitor is added to the output current and compensates for the odd harmonic distortion.
Claims4
A transistor follower circuit which provides capacitive compensation for harmonic distortion of a capacitive load voltage;
- said circuit comprising:
- a first input terminal (4) for receiving an input signal and a first output terminal (6) for connection to a capacitive load across which an output signal is produced by said circuit in response to the input signal;
- a first transistor (2) having a control electrode coupled to the first input terminal (4) and a first main electrode coupled to the first output terminal (6);
- and
- a first bias current means (12) coupled to the first main electrode of said first transistor (2) for supplying a first bias current to said first transistor (2);
- characterized in that said circuit further comprises:
- a second transistor (18) having a first main electrode coupled to a second bias current means (22) for supplying a second bias current to the second transistor (18), a control electrode of the second transistor (18) being coupled to the first input terminal (4);
- a third transistor (14) having a first main electrode coupled to the first bias current means (12), a second main electrode coupled to the first main electrode of the first transistor (2), and a control electrode coupled to a source of bias voltage;
- and
- a compensation capacitor (20) coupled between the first main electrode of the second transistor (18) and the first main electrode of the third transistor (14).
Dependencies are inferred from the claim text.