Low drop-out voltage regulator with PMOS pass element

Abstract

A voltage regulator circuit includes: a first MOS transistor 12 coupled between a voltage supply line and an output node 44, the first MOS transistor 12 providing a stable voltage on the output node 44; a source follower 24 coupled to a gate of the first MOS transistor 12; an amplifier 38 coupled to a gate of the source follower 24 for controlling the response of the first MOS transistor 12; negative feedback circuitry coupled between the output node 44 and the amplifier 38, the feedback circuitry providing feedback to the amplifier 38; a current conveyer 46 coupled to the first MOS transistor 12; and positive feedback circuitry 26 coupled between the current conveyer 46 and the source follower 24.

Dependencies are inferred from the claim text.