Staggered thin film transistor with transparent electrodes and an improved ohmic contact structure

A forward staggered thin film transistor comprising:

• an insulator;
• source/drain electrodes selectively provided on an insulator, each of said source/drain electrodes comprising an undoped transparent conductive film on said insulator and an impurity doped transparent conductive film on said undoped transparent conductive film;
• an amorphous silicon active layer extending over said source/drain electrodes and a top surface of said insulator so that said amorphous silicon active layer over said source/drain electrodes has an impurity diffused interface in contact with said impurity doped transparent conductive film to form an ohmic contact between said impurity doped transparent conductive film and said amorphous silicon active layer, said impurity diffused interface not contacting said top surface of said insulator whilst said amorphous silicon active layer in contact with said top surface of said insulator between said source/drain electrodes is free of any impurity introduced region;
• a gate insulation film extending over said amorphous silicon active layer;
• and
• a gate electrode provided on said gate insulation film.

A forward staggered thin film transistor comprising:

• a glass substrate;
• an optical shielding metal film selectively provided on a first predetermined region of a top surface of said glass substrate;
• an inter-layer insulator extending over said optical shielding metal film and said top surface of said glass substrate;
• source/drain electrodes selectively provided on second predetermined regions of a top surface of said interlayer insulator, each of said source/drain electrodes comprising an undoped indium tin oxide film on said inter-layer insulator and an impurity doped indium tin oxide film on said undoped indium tin oxide film;
• an amorphous silicon active layer extending over said source/drain electrodes and said top surface of said inter-layer insulator so that said amorphous silicon active layer over said source/drain electrodes has an impurity diffused interface in contact with said impurity doped indium tin oxide film to form an ohmic contact between said impurity doped indium tin oxide film and said amorphous silicon active layer, said impurity diffused interface not contacting said top surface of said interlayer insulator, whilst said amorphous silicon active layer in contact with said top surface of said inter-layer insulator between said source/drain electrodes is free of any impurity introduced region;
• a gate insulation film extending over said amorphous silicon active layer;
• and
• a gate electrode provided on said gate insulation film.