System for performing DMA byte swapping within each data element in accordance to swapping indication bits within a DMA command

A direct memory access (DMA) controller for controlling memory access operations upon a memory, the DMA controller comprising:

• register means for receiving and storing at least one DMA command from a set DMA commands, each of the DMA commands specifying one of a plurality of memory access operations, each of the at least one DMA commands including at least one byte swapping bit;
• and
• swapping means for receiving a data item read from or to be written to the memory, the data item including a plurality of bytes, the swapping means for swapping bytes in the data item according to the at least one byte swapping bit.

A direct memory access (DMA) controller for controlling memory access operations performed upon a memory, the DMA controller comprising:

• a command register receiving and storing a DMA command, the DMA command including an address portion and a length portion, the length portion including a plurality of signal bits designating a byte swapping operation;
• and
• a multiplexor coupled to receive the signal bits and coupled to receive a data word read from the memory at any of a plurality of inputs, the data word including a plurality of bytes, each of the inputs corresponding to the data word according to a different possible byte order, the multiplexor selecting one of the inputs according to the signal bits and outputting a modified data word having swapped bytes.

In a processing system having a host processor, a memory coupled to the host processor, and a peripheral component coupled to the host processor and to the memory, the peripheral component including a direct memory access (DMA) controller, a method of swapping bytes of data words read from or to be written to the memory, the method comprising the steps of:

• providing a DMA command to the DMA controller, the DMA command for performing a DMA memory access and including a signal bit designating a byte swapping pattern;
• using the DMA controller to read a data word from the memory in response to the DMA command, the data word including a plurality of bytes;
• using the DMA controller to rearrange the bytes of the data word read from the memory based on the signal bit to form a modified data word for use by the peripheral component.