Data processor system with instruction substitution filter for deimplementing instructions

An instruction deimplementation subsystem for deimplementing instructions in a system including processor means for processing data by executing implemented instructions, memory means for storing said data and said instructions, and bus means for conveying addresses, instructions, and data between said processor means and said memory means, said subsystem comprising:

• instruction input means for receiving stored instructions from said memory means via said bus means;
• instruction output means for transmitting filtered instructions to said processor means via said bus means;
• configuration input means for receiving configuration data via said bus means from at least one of said processor means and said memory means, said configuration data indicating which of said implemented instructions are deimplemented instructions and which of said implemented instructions are non-deimplemented instructions;
• and
• instruction conversion means for generating said filtered instructions from said stored instructions as they are received at said instruction input means in accordance with said configuration data so that the filtered instruction corresponding to one of said non-deimplemented instructions is the same as that non-deimplemented instruction and so that the filtered instruction corresponding to one of said deimplemented instructions is a substitute instruction differing from that deimplemented instruction, said instruction conversion means being coupled to said instruction input means for receiving stored instructions therefrom, said instruction conversion means being coupled to said instruction output means for transmitting said filtered instructions therefrom, said instruction conversion means being coupled to said configuration input means for receiving said configuration data therefrom.