Universal asynchronous receiver/transmitter (UART) slave device containing an identifier for communication on a one-wire bus
AssigneeDallas Semiconductor Corporation
InventorsAndreas Curiger, Wendell L. Little, Matthew K. Adams
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Abstract
A processor system is disclosed wherein said processor system is adapted to communicate over at least one one-wire network utilizing one-wire communications protocol. For the embodiment of the invention in which the processor system acts as a network master, the processor system includes a master UART especially configured to control communications over such network according to one-wire protocol. For the embodiment of the invention in which the processor communicates over two one-wire networks, the processor system includes a first UART which acts as a slave and a second UART which acts as a master.
Claims15
A processor system capable of communicating on a one-wire network, said processor system comprising:
- a microprocessor on an integrated circuit,
- a first UART, on said integrated circuit, connected to said microprocessor, said first UART for communicating on a first single wire bus to a first external circuit, said first UART is a slave device that further comprises an identification that can be communicated on said first single wire bus.
An integrated circuit comprising:
- a microprocessor;
- a first UART, connected to said microprocessor, adapted to communicate on a one-wire data network to at least one external circuit, said first UART is a slave device which comprises an identification means.
Dependencies are inferred from the claim text.