Dynamic memory device with circuits for setting self-refreshing period

A driving method for a dynamic memory device comprising the steps of:

• generating first and second refreshing timing signals having mutually different periods;
• generating different levels of selection signals detecting a time difference of a level variation timing of only one of a plurality of external control signals;
• selecting one of said first and second refreshing timing signal depending upon the level of said selection signal;
• detecting the current mode being the self-refreshing mode;
• generating an internal address signal sequentially updated address value in synchronism with one of said first and second refreshing timing signals;
• and
• controlling refreshing operation for a memory cell array by said internal address signal.

A driving method for a dynamic memory device products comprising the steps of:

• generating first and second refreshing timing signals having mutually different periods:
• generating different levels of selection signals detecting a time difference of a level variation timing of two or three external control signals;
• selecting one of said first and second refreshing timing signal depending upon the level of said selection signal;
• detecting the current mode being the self-refreshing mode;
• generating an internal address signal sequentially updated address value in synchronism with one of said first and second refreshing timing signals;
• controlling refreshing operation for a memory cell array by said internal address signal;
• measuring a data holding period of said memory array;
• classifying said products into groups, including a group having a long data holding period and a group having a short data holding period shorter than said long data holding period;
• driving the dynamic memory device with defining the external control signal to have level variation timing for selecting one of first and second refreshing timing signal having a longer period for the products included in said group having said long data holding period;
• and
• driving the dynamic memory device with defining the external control signal to have level variation timing for selecting one of first and second refreshing timing signal having a shorter period for the products included in said group having said short data holding period.