Read bitline writer for fallthru in fifos
AssigneeCypress Semiconductor Corporation
InventorsAndrew L. Hawkins, Muthukumar Nagarajan, Ajay Srikrishna
Life of this patent
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Abstract
A method and apparatus for writing data onto the read bitline when a FIFO buffer memory is nearly empty that includes circuitry detecting when a memory is nearly empty, when the read pointer and the write pointer are on the same line with the read pointer behind the write pointer. Another circuit writes data onto the read bitline as the data is written into the buffer memory.
Claims20
A method for writing data onto a read bitline of a FIFO buffer comprising the steps of:
- connecting a data input to said read bitline, wherein said read bitline is not shorted to a write bitline;
- and
- writing data from the data input to the read bitline as the data from the data input is written to a write bitline when said read pointer and said write pointer are in the same row.
An apparatus for writing data onto a read bitline in a FIFO memory having a read pointer, a write pointer and a data input line, the apparatus comprising:
- access means connected directly between said data input line and said read bitline for controlling data flow between said data input line and said read bitline, said access means having an on state and an off state wherein said information flows between said data input line and said read bitline when said access means is in said on state;
- and
- a control circuit configured to place said access means in said on state when the read pointer and the write pointer are in the same row with the read pointer behind the write pointer.
An apparatus for providing data directly onto a read bitline in a FIFO memory comprising:
- a read pointer configured to indicate a memory cell to be read;
- a write pointer configured to indicate a memory cell to be written;
- access means connected directly between a data input line and a read bitline for controlling data flow between said input line and said read bitline, said access means having an on state and an off state, wherein information flows between said data input line and said read bitline when said access means is in said on state;
- and
- a pointer detecting circuit configured to place said access means in said on state when the read pointer and the write pointer are in the same row with the read pointer behind the write pointer.
A method for providing data directly onto a read bitline in a FIFO memory having a plurality of rows, a read pointer and a write pointer, said method comprising the steps of:
- detecting when the memory is nearly empty;
- connecting a data input line and read bitline directly through a gate having an on state and an off state;
- controlling data flow between said data input line and said read bitline by controlling said on state and said off state;
- and
- placing said gate in said on state when (i) said memory is nearly empty and (ii) said read pointer and said write pointer are in the same row with the read pointer behind the write pointer.
Dependencies are inferred from the claim text.