Apparatus and method for testing a memory

In a memory testing apparatus wherein a plurality of function tests are continuously carried out for a semiconductor memory to be tested, information of a failure memory cell or cells detected in the semiconductor memory is stored in a failure analysis memory upon completion of each function test, and a decision as to whether or not said semiconductor memory can be relieved is rendered depending upon the number of failure memory cells stored in said failure analysis memory,

• a method for testing a memory comprising the steps of:
• comparing, after one of said function tests is performed, the number of failure memory cells of a memory under test detected in the preceding function test with the number of failure memory cells of the memory under test detected in a function test performed this time;
• and
• performing a failure relieving analysis of the memory under test only when the number of failure memory cells detected this time is greater than the number of failure memory cells detected in the preceding function test.