US 5,862,068 A · Arithmetic circuit for calculating a square-root of a sum of squares

Abstract

An arithmetic circuit with a small number of parts performs high-speed arithmetic operations for calculating a square-root of a sum of squares of two numbers. Absolute values of two inputs S.sub.in1 and S.sub.in2 are determined by absolute value calculators and are compared by an absolute value comparator According to the comparison result, a first multiplexer selects the smaller of the two absolute values and a second multiplexer selects the larger of the two absolute values. The smaller absolute value is shifted by a 2-bit right shifter and by a 3-bit right shifter respectively, and the obtained shifted results are added together by a (N-2)-bit adder. The sum of the shifted values is then added by a N-bit adder to the larger absolute value. A square-root of the square-sum of two inputs S.sub.in1 and S.sub.in2 is thus approximately determined,

Claims8

Dependent claims

An arithmetic circuit for calculating a square-root of a sum of squares, the circuit comprising:

first and second absolute value calculators for calculating absolute values of individual input signals,
an absolute value comparator for comparing the two absolute values,
a first multiplexer for outputting a smaller of the two absolute values calculated by the first and second absolute value calculators by using a comparison result made by tie absolute value comparator as a selecting signal,
a second multiplexer for outputting a larger of the two absolute values calculated by the first and second absolute value calculators by using the comparison result made by the absolute comparator as a selecting signal,
a plurality of multipliers, each for multiplying an output of the first multiplexer by 1/2 raised to a different power,
a first adder for adding together outputs of the plurality of multipliers, and
a second adder for adding together an output of the first adder and an output of the second multiplexer.

4 more elements

Dependencies are inferred from the claim text.

Arithmetic circuit for calculating a square-root of a sum of squares

Life of this patent

Arithmetic circuit for calculating a square-root of a sum of squares

Life of this patent

Abstract

Claims8