System and method for graphics data concurrency and coherency
AssigneeIntel Corporation
InventorJay J. Sturgess
Life of this patent
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AssigneeIntel Corporation
InventorJay J. Sturgess
Estimating the term…
A graphics controller enhances concurrency among multiple pipelines, provides high throughput to graphics resources between 2D and 3D pipelines spawned by an application, and provides low latency for 2D pipelines spawned by an operating system. The graphics controller includes a command parser, arbitration logic, a BLTBIT engine having first and second operating registers. Graphics commands from the application are routed through the command processor, while graphics commands from the operating system are written to the second operating register. Access signaling bits associated with each operating register for communicating between the arbitration logic and the application and operating system. Graphics commands from application-spawned pipelines are coupled through the command parser to specified graphics resources, including the first operating register. An arbitration scheme assigns higher priority to BLTBIT engine accesses initiated by pipelines spawned by the operating system.
A graphics controller for coordinating access to graphics resources, the graphics controller comprising:
A graphics controller for coordinating access to graphics resources by multiple pipelines executing on a host processor that is coupled to the graphics controller, the graphics controller comprising:
A graphics controller for processing graphics commands from an application program and an operating system running on a host processor that is coupled to the graphics controller, the graphics controller comprising:
A method for concurrently processing commands from an operating system and an application program in a graphics controller having a command parser for routing commands to graphics resources, including a BLTBIT engine, the method comprising the steps of:
Dependencies are inferred from the claim text.