Intermediate frequency (IF) sampling clock-to-clock auto-ranging analog-to-digital converter (ADC) and method

A clock-to-clock auto-ranging dual-channel analog-to-digital converter (ADC), comprising:

• a timing circuit that generates an internal clock signal at a sampling frequency;
• a pair of signal inputs for receiving main and diversity analog signals of sufficiently high frequency that at least one half of a period of said analog signals occurs during a detection portion of each cycle of the clock signal;
• a control input for receiving a control signal that selects a) the main signal, b) the diversity signal, or c) the main and diversity signals on alternating clock cycles;
• a pair of programmable attenuators that, when selected, attenuate the main and diversity analog signals, respectively, at a reference attenuation level during said detection portion and at a selected attenuation level during a remaining hold portion of the clock cycle;
• a fixed-range ADC that samples the selected attenuated analog signal at said sampling frequency over a full-scale input range such that the selected attenuated analog signal during the hold portion is aliased into a frequency region between DC and one half the sampling frequency and that converts the samples into a digital signal;
• and
• a peak detector that detects a peak level of the selected analog signal during said detection portion of each cycle, resets the selected attenuator's attenuation level based upon said peak level such that the amplitude of the attenuated analog signal presented to the fixed-range ADC is within its full-scale input range prior to the next sampling period, and outputs a codeword that represents the selected attenuation level.

An intermediate frequency (IF) receiver, comprising:

• a main antenna for receiving a radio frequency (RF) carrier signal that is modulated with a plurality of baseband information signals such that they lie in different intermediate frequency (IF) bands in different RF channels, said baseband information signals having a dynamic range;
• a main RF filter for selecting an RF channel from the RF carrier signal;
• a local oscillator for downconverting the selected RF channel to select an IF band;
• a main IF filter for selecting a modulated carrier signal from the IF band that is modulated with one of the baseband information signals, the modulated carrier signal's power envelope varying over a wide dynamic range;
• an auto-ranging analog-to-digital converter (ADC) that converts the modulated carrier signal into a digital signal that represents the selected baseband information signal, said ADC comprising:
• a timing circuit that generates an internal clock signal at a sampling frequency that is sufficiently low that at least one half of a period of the modulated carrier signal occurs during a detection portion of each cycle of the clock signal and sufficiently high that it satisfies the Nyquist sampling criterion for the baseband information signal;
• a main programmable attenuator that attenuates the modulated carrier signal at a reference attenuation level during said detection portion and at a selected attenuation level during a remaining hold portion of the clock cycle;
• a fixed-range ADC that samples the attenuated carrier signal at said sampling frequency over a full-scale input range such that the attenuated analog signal during the hold portion is aliased into a frequency region between DC and one half the sampling frequency and that converts the samples into a digital signal that accurately represents the baseband information signal;
• a peak detector that detects a peak level during said detection portion of each cycle, resets the selected attenuation level based upon said peak level such that the amplitude of the attenuated carrier signal presented to the fixed-range ADC is within its full-scale input range prior to the next sampling period, and outputs a codeword that represents the selected attenuation level;
• and
• a digital signal processor (DSP) that combines the digital signal and said codeword and extracts the baseband information signal.

A method of converting an analog signal to a digital signal, comprising:

• generating an internal clock signal at a sampling frequency that defines a sampling period;
• receiving an analog signal of sufficiently high frequency that at least one half of a period of said analog signal occurs during a detection portion of each sampling period;
• at the onset of each sampling period, attenuating the analog signal at a reference attenuation level;
• detecting a peak level over at least one half cycle of the attenuated signal;
• selecting an attenuation level for the detected peak level such that the amplitude of the attenuated signal lies within a full-scale conversion range during the remaining portion of the current cycle;
• outputting a codeword that represents the selected attenuation level;
• attenuating the analog signal at the selected attenuation level;
• sampling the attenuated analog signal at said sampling frequency over the full-scale conversion range such that the attenuated analog signal during the hold portion is aliased into a frequency region between DC and one half the sampling frequency;
• and
• at the onset of the next sampling period, converting the samples of the attenuated signal into a digital signal.