Multimode frequency synthesizer having high loop gain in frequency seek mode
AssigneeWestern Digital Corporation
InventorsHoward Anthony Baumer, David Kyong-sik Chung, Gerald Weslie Shearer
Life of this patent
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Abstract
A frequency synthesizer has multiple modes of operation including a relatively short-duration frequency seek mode and a relatively long-duration normal mode. The synthesizer responds to a reference frequency signal and produces a periodic signal at a frequency that is a rational number times the frequency of the reference frequency signal. The synthesizer comprises a VCO, a feedforward state machine, a feedback state machine, a phase comparator, controllable gain circuitry between the phase comparator and the VCO, and logic circuitry that coordinates the operation of the feedforward and feedback state machines during the seek mode.
Claims26
A frequency synthesizer responsive to a reference frequency signal and having multiple modes of operation including a relatively short-duration frequency seek mode and a relatively long-duration normal mode, the frequency synthesizer comprising:
- an oscillator providing a periodic output signal having a frequency;
- a feedforward state machine including a first register for storing a first start state and being responsive to the reference frequency signal to define a first counting cycle by counting from the first start state to a first end state;
- a feedback state machine including a second register for storing a second start state and being responsive to the periodic output signal to define a second counting cycle by counting from the second start state to a second end state;
- a phase comparator coupled to the feedfoward state machine and the feedback state machine;
- controllable gain control means coupled between the phase comparator and the oscillator;
- wherein the feedforward state machine further includes means responsive to the first end state of the first register for providing a first time-varying, binary-valued signal to the phase comparator;
- the feedback state machine further includes means responsive to the second end state of the second register for providing a second time-varying, binary-valued signal to the phase comparator;
- the controllable gain control means providing a control signal to the oscillator to control the frequency of the periodic output signal;
- the feedforward and feedback state machines defining the counting cycles independently of each other in the normal mode;
- a logic circuitry coupled to the controllable gain control means, the feedforward state machine, and the feedback state machine for causing the frequency synthesizer to have a higher loop gain in the seek mode than in the normal mode, and for repeatedly coordinating the first and second counting cycles of the feedforward and the feedback state machines during the seek mode to cause the first and second registers repeatedly to begin counting from the first and second start states substantially simultaneously.
An integrated circuit for an embedded-servo disk drive that includes a microprocessor to supervise operations including writing and reading in accordance with a zone-banded format, the integrated circuit including a frequency synthesizer, a bus, and first and second registers for receiving respectively programmed first and second start values from the microprocessor, the frequency synthesizer receiving a reference frequency signal and having multiple modes of operation including a relatively short-duration frequency seek mode and a relatively long-duration normal mode, the frequency synthesizer comprising:
- an oscillator providing a periodic output signal having a frequency;
- a feedforward state machine including a first register for storing the first start state and being responsive to the reference frequency signal to define a first counting cycle by counting from the first start state to a first end state;
- a feedback state machine including a second register for storing the second start state and being responsive to the periodic output signal to define a second counting cycle by counting from the second start state to a second end state;
- a phase comparator coupled to the feedforward state machine and the feedback state machine;
- controllable gain control means coupled between the phase comparator and the oscillator;
- wherein the feedforward state machine further includes means responsive to the first end state of the first register for providing a first time-varying, binary-valued signal to the phase comparator;
- the feedback state machine further includes means responsive to the second end state of the second register for providing a second time-varying, binary-valued signal to the phase comparator, the controllable gain control means providing a control signal to the oscillator to control the frequency of the periodic output signal;
- the feedforward and feedback state machines defining the counting cycles independently of each other in the normal mode;
- a logic circuitry coupled to the controllable gain control means, the feedforward state machine, and the feedback state machine for causing the frequency synthesizer to have a higher loop gain in the seek mode than in the normal mode, and for repeatedly coordinating the first and second counting cycles of the feedforward and the feedback state machines during the seek mode to cause the first and second registers repeatedly to begin counting from the first and second start states substantially simultaneously.
Dependencies are inferred from the claim text.