Switching power supply circuit
AssigneeNEC Corporation
InventorTakahito Uchida
Life of this patent
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Abstract
Switching power supply circuit of the invention is provided with an nMOS transistor (Q1) and a pMOS transistor (Q2) connected in parallel inversely for switching an input DC voltage, and a driving circuit (3) for switching the nMOS transistor (Q1) when the duty-cycle is small and the pMOS transistor (Q2) when the duty-cycle becomes large. Therefore a stable output voltage can be obtained through the pMOS transistor (Q2) against fall of the input DC voltage supplied from a battery until its available limit determined by on-resistance of the pMOS transistor (Q2), while the stable output voltage can be obtained with minimum driving loss through the nMOS transistor (Q1) having smaller input parasitic capacitance compared to the pMOS transistor (Q2), when the input DC voltage is sufficiently high.
Claims4
A switching power supply circuit having a first conductivity type transistor for generating a switched voltage by switching an input DC voltage, a drive circuit for obtaining a first gate control signal to drive the first conductivity type transistor according to pulse width of a switching pulse signal, a pulse width modulation circuit for generating the switching pulse signal, a constant voltage circuit supplied with the input DC voltage for supplying a constant voltage to the drive circuit, and a smoothing circuit for obtaining an output DC voltage by smoothing the switched voltage;
- said switching power supply circuit further comprising:
- a second conductivity type transistor connected in parallel to the first conductivity type transistor inversely;
- a duty-cycle detector circuit for obtaining a duty signal whereof logic turns when a duty-cycle of the switching pulse signal becomes larger than a fixed value;
- a first logic circuit for making the first gate control signal inactive according to the duty signal when the duty-cycle of the switching pulse signal becomes larger than the fixed value;
- and
- a second logic circuit for driving the second conductivity type transistor according to inverse logic of the switching pulse signal when the duty-cycle of the switching pulse signal becomes larger than the fixed value.
Dependencies are inferred from the claim text.