Integrated-circuit die suitable for wafer-level testing and method for forming the same

A semiconductor wafer, comprising:

• a scribe line having first and second conductive paths;
• and
• a plurality of memory dies each having a die edge that is adjacent to said scribe line and each including,
• a substrate of semiconductor material that is contiguous with said die edge;
• a first conductive layer disposed on said substrate;
• a first insulator layer that is disposed between said substrate and said conductive layer;
• a protective layer that is disposed on said conductive layer and that extends to said die edge;
• third and fourth conductive paths that are disposed beneath said insulator layer and respectively coupled to said first and second conductive paths;
• a signal node that is disposed in said die, said signal node coupled to said third conductive path;
• a supply node that is disposed in said die, said supply node coupled to said fourth conductive path;
• an isolatable supply node that is disposed in said die;
• an array of memory cells that is disposed in said die, said array coupled to said signal node and to said isolatable supply node;
• an address decoder that is disposed in said die, said address decoder coupled to said array, said signal node, and said isolatable supply node, said address decoder operable to select an addressed one of said memory cells;
• an address buffer that is disposed in said die, said address buffer coupled to said address decoder, said signal node, and said isolatable supply node, said address buffer operable to control said address decoder;
• a data buffer that is disposed in said die, said data buffer coupled to said array of memory cells, said signal node, and said isolatable supply node, said data buffer operable to read data from and write data to said array;
• and
• a switch circuit that is disposed in said die, said switch circuit having a control terminal that is coupled to said signal node and having a switchable path that is coupled between said supply node and said isolatable supply node.