Capacitor unit of a booster circuit whose low-voltage operating point margin can be expanded while an increase in area occupied thereby is suppressed

A booster circuit for boosting a first voltage using a capacitor unit so as to generate a second voltage, wherein said capacitor unit comprising:

• at least one MOS capacitor each formed by a MOS transistor;
• and
• at least one conductive electrode capacitor, each connected in parallel with corresponding MOS capacitor, and each conductive electrode capacitor including a first conductive electrode and a second conductive electrode which are mutually opposed, and a dielectric layer interposed between said first and second conductive electrodes, a size of said first and second conductive electrodes constituting each conductive electrode capacitor being set to be smaller than that of the gate of the MOS transistor constituting each MOS capacitor.

A semiconductor integrated circuit comprising a booster circuit for boosting a first voltage using a capacitor unit so as to generate a second voltage and a functional circuit for receiving an output voltage of said booster circuit, and being formed as a one-chip circuit, wherein said capacitor unit comprising:

• at least one MOS capacitor each formed by a MOS transistor;
• and
• at least one conductive electrode capacitor, each connected in parallel with corresponding MOS capacitor, and each conductive electrode capacitor including a first conductive electrode and a second conductive electrode which are mutually opposed, and a dielectric layer interposed between said first and second conductive electrodes, a capacitance value of each of said conductive electrode capacitors being set to be smaller than a capacitance value of each of said MOS capacitors.

A semiconductor integrated circuit comprising a booster circuit for boosting a first voltage using a capacitor unit so as to generate a second voltage and a functional circuit for receiving an output voltage of said booster circuit, and being formed as a one-chip circuit, wherein said capacitor unit comprising:

• at least one MOS capacitor each formed by a MOS transistor;
• and
• at least one conductive electrode capacitor, each connected in parallel with corresponding MOS capacitor, and each conductive electrode capacitor including a first conductive electrode and a second conductive electrode which are mutually opposed, and a dielectric layer interposed between said first and second conductive electrodes, a size of said first and second conductive electrodes constituting each conductive electrode capacitor being set to be smaller than that of the gate of the MOS transistor constituting each MOS capacitor.