Semiconductor device having charge transfer device equipped with three semiconductor layers of same conductivity type with mutually different concentrations

A charge transfer device comprising:

• a plurality of blocks formed consecutively in a semiconductor substrate and comprising a charge transfer path, each of said blocks comprising three regions being of a same depth and having mutually different impurity concentrations;
• a plurality of first electrodes, each covering two adjacent regions of said three regions, wherein complementary clock signals are supplied to adjacent ones of said plurality of said first electrodes, said complimentary clock signals alternating between a first voltage and a second voltage;
• and
• a plurality of second electrodes, each covering a third region of said three regions and being supplied with one of said first voltage and said second voltage as a constant potential.

A semiconductor device comprising:

• a plurality of photo-diodes;
• a vertical transfer part for receiving a plurality of signals from said plurality of photo-diodes and for transferring said signals sequentially;
• and
• a horizontal transfer part for receiving said signals transferred from said vertical transfer part and for transferring said signals sequentially to an output terminal,
• at least one of said horizontal transfer part and said vertical transfer part having a plurality of consecutively arranged blocks, each of said blocks including three semiconductor regions being of a same depth and having a same conductivity type of mutually different impurity concentrations,
• wherein complementary clock pulses, alternating between a first voltage and a second voltage, are supplied in to even-numbered blocks and odd-numbered blocks of said plurality of blocks,
• said semiconductor device further comprising a first electrode covering two adjacent semiconductor regions of said three semiconductor regions and being supplied with a clock pulse of said complementary clock pulses;
• and
• a second electrode covering a third semiconductor region of said three semiconductor regions and being supplied with one of said first voltage and said second voltage as a constant potential.