High speed FIFO mark and retransmit scheme using latches and precharge
AssigneeCypress Semiconductor Corporation
InventorsPidugu L. Narayana, Daniel Eric Cress, Andrew L. Hawkins, Ping Wu
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Abstract
The present invention provides a look ahead architecture to satisfy the retransmit recovery time constraints in a mark and retransmit system while allowing a full bitline precharge. A number of sense amplifiers are provided in the look ahead architecture that may be equipped with a "shadow latch" to store the read data when the mark pointer is asserted. As a result, the data to be retransmitted will be retrieved from the shadow latches when the retransmit is asserted, allowing a full precharge cycle before reading from the memory array.
Claims20
A circuit comprising:
- a memory having a plurality of locations, a read pointer, and a write pointer;
- a mark circuit configured to indicate a first location of said memory;
- a first latch circuit configured to store one or more words following said first location;
- and
- a select circuit configured to read said one or more words from said first latch circuit in response to a first state of a retransmit signal, wherein said first latch circuit, said mark circuit and said select circuit do not affect data stored in a row, column or block of said memory.
A circuit comprising:
- means for storing data in a plurality of locations;
- means for indicating one of said locations for which to read or write data;
- means for marking a first location of said memory;
- means for writing one or more words to a first latch after said marking means marks said first location;
- means for writing one or more words to a second latch at a time other than following said location;
- and
- means reading said one or more words from said first latch after a retransmit signal is asserted, wherein said means for storing, means for writing and means for reading do not affect a row, column or block of said means for storing.
A method for reading one or more selected words in a memory having a read pointer and a write pointer, comprising the steps of:
- selecting a first location of said memory;
- writing one or more words to a first latch after said selecting step;
- precharging a wordline of said memory;
- and
- reading said one or more words from said first latch.
Dependencies are inferred from the claim text.