Method and apparatus for enabling physical memory larger than corresponding virtual memory
AssigneeNCR Corporation
InventorsPeter Washington, John H. Waters, Richard R. Barton, Vernon K. Boland
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Abstract
A method and apparatus for enabling a physical memory larger than a corresponding virtual memory. An apparatus is disclosed that includes a processor having an address word of a predefined length, a main memory having a size larger than the addressable range of the predefined address word, and virtual memory logic for configuring the processor virtual memory to contain a subset of the main memory as resident memory and pointers to the remainder of main memory. Analogous method steps are disclosed as is dividing main memory into a plurality of buffer uniquely identifiable within the address range of the predefined address word.
Claims17
A method of allocating memory, comprising the steps of:
- providing a processor having an address word length of a predefined size;
- providing a main memory having a size larger than the addressable range of said predefined address word for storing data for use by a process running in said processor;
- dividing said main memory into a plurality of buffers, each uniquely identifiable within the addressable range of said predefined address word;
- creating a unique identifier for a number of said buffers which when multiplied by buffer size equals a memory size larger than the addressable range of said predefined address word;
- and
- providing said unique identifiers in the virtual address space of a process running in said processor.
An apparatus for processing electronic data, comprising:
- a processor having an address word of a predefined length;
- a main memory having a size larger than the addressable range of said predefined address word;
- and
- virtual memory logic for configuring a virtual memory of said processor to have an address range addressable by said predefined address word and to contain a subset of said main memory as resident memory and pointers to the remainder of said main memory.
An apparatus for processing electronic data, comprising:
- a processor having an address word of a predefined length;
- a main memory having a size larger than the addressable range of said predefined address word;
- and
- means for dividing said main memory into a plurality of buffers, uniquely identifiable within the address range of said predefined address word.
Dependencies are inferred from the claim text.