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AssigneeData General Corporation
InventorBrian Martin
Estimating the term…
A BIOS address decoder for addressing an extended BIOS memory for storing additional microprograms in a computer system. A system component is connected from the bus for receiving program instruction addresses in a first address range and providing corresponding BIOS memory addresses in a corresponding first BIOS address range. The BIOS address decoder includes the system component to receive a first subset of bus address bits representing bus addresses in the first instruction address range and responsive to the first subset of bus address bits to generate corresponding BIOS addresses in the first BIOS address range and a BIOS address indication indicating that the first subset of bus address bits indicates a bus address in the first instruction address range. An extended BIOS decoder is connected from the bus to receive a second subset of bus address bits representing bus addresses including an extended instruction address range and from the system component to receive the BIOS address indication output and is responsive to the second subset of bus address bit and the BIOS address indication for generating an extended BIOS memory enable output having a first state when the second subset of bus address bits does not represent a bus address including the extended instruction address range and a second state when the second subset of bus address bits represent a bus address including the extended instruction address range.
In a computer system including a processor for performing operations on data, a memory for storing programs including sequences of program instructions for controlling the operations of the processor, a bus interconnecting the processor and memory for the transfer of program instructions, data and addresses therebetween, a BIOS memory for storing BIOS microprograms for controlling operations of the processor wherein the BIOS microprograms correspond to program instructions and include sequences of microinstructions for directing corresponding operations of the processor, and a system component connected from the bus for receiving program instructions as bus addresses in a first instruction address range and providing corresponding BIOS memory addresses in a corresponding first BIOS address range normally reserved for BIOS microprograms to the BIOS memory for reading corresponding BIOS microprograms from the BIOS memory to control the operations of the microprocessor, a BIOS address decoder for addressing an extended BIOS memory for storing additional microprograms, comprising:
Dependencies are inferred from the claim text.