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AssigneeAlcatel
InventorThierry Kapp
Estimating the term…
A method and apparatus for programming electrically reprogrammable non-volatile memory associated with a processor which is also conventionally associated with read/write memory, both of which memories are necessary to operate the processor in a determined manner, optionally within some larger unit. In order to load the permanent data required for operation of the processor into the non-volatile memory, a memory-activation signal provided by the processor is switched to a temporarily connected auxiliary memory in order to start up the processor on the basis of initiation data contained in the auxiliary memory, to transfer into the read/write memory data that is present in the auxiliary memory and that corresponds to the data for recording in the non-volatile memory, and then to transfer the data from the read/write memory into the non-volatile memory after the processor has deactivated the auxiliary memory.
A method of programming an electrically reprogrammable non-volatile memory associated with a processor which is also conventionally associated with a read/write memory, both of which memories being necessary to operate the processor in a determined manner, to load the non-volatile memory with operating data necessary for enabling the processor to operate in the determined manner, said method comprising the steps of:
An apparatus for programing an electrically reprogrammable non-volatile memory associated with a processor, which processor provides a memory activation signal at an activation signal output and which processor is also associated in a conventional manner with a read/write memory, both of said memories being required to enable said processor to operate in a determined manner and both being connected thereto for this purpose via a bus that is normally on a common support, the apparatus including an auxiliary non-volatile memory carried by an independent support suitable for connecting to the support of the processor via connection means so as to connect said auxiliary memory to the bus for communications purposes and a switch member under the control of the processor and connected to said activation signal output of said processor so as to switch the memory activation signal either to the auxiliary memory or else to the non-volatile memory under the control of the processor, whereby data can be transferred from said auxiliary memory to said read/write memory when said activation is switched to said auxiliary means and can be transferred from said read/write memory to said non-volatile memory when said activation signal is switched to said non-volatile memory.
A unit comprising at least one electrically reprogrammable non-volatile memory associated with a processor that is also associated with a read/write memory, both of said memories being necessary to enable the processor to operate in a determined manner and being connected thereto via a processor bus that is normally on a common support, the unit including connection means suitable for connecting the processor bus to an external source of programming information, in particular of the type comprising an electrically reprogrammable external auxiliary memory, and switch means under the control of the processor and connected to an activation output of said processor designed for the electrically reprogrammable memory of said processor, so as to switch an activation signal that appears on said output either to the external source of information, or else to the non-volatile memory under the control of the processors, whereby data can be transferred from said external source of information to said read/write memory when said activation signal is switched to said external source of information and can be transferred from said read/write memory to said non-volatile memory when said activation signal is switched to said non-volatile memory.
Dependencies are inferred from the claim text.