Tuning circuit for a receiver, particularly a television receiver

A tuning circuit for a receiver, said tuning circuit comprising a local oscillator having a voltage-controlled frequency, said local oscillator comprising an amplifier coupled to a resonant circuit having variable capacitance and inductance, an output terminal of the amplifier being positively fed back to an input of the amplifier and to a terminal of the resonant circuit, the amplifier comprising a first stage having at least a first differential pair of bipolar transistors having linked emitters fed by a first current source, said first differential pair of bipolar transistors comprising a first transistor having a base connected to a first input terminal of the amplifier, and a second transistor having a base connected to a second input terminal of the amplifier, said second transistor having a collector coupled to a first main load resistor, said first main load resistor having one end connected to a power supply terminal and another end connected to a first output terminal of the amplifier, while symmetrically, a collector of the first transistor is coupled to a second main load resistor, said second main load resistor being connected to a second output terminal of the amplifier, characterized in that the first stage of the amplifier further comprises a second differential pair of transistors having linked emitter connected to a second current source, said second differential pair of transistors comprising a further first transistor homologous to the first transistor and having a base connected to the base of the first transistor and a collector coupled to a first supplementary load resistor, and a further second transistor homologous to the second transistor and having a base connected to the base of the second transistor and a collector coupled to a second supplementary load resistor,

• and in that the amplifier further comprises a second stage having two differential pairs of transistors, said two differential pairs of transistors comprising:
• a third differential pair of transistors having linked emitters connected to the collector of the second transistor, wherein a third transistor of the third differential pair of transistors has a collector connected to the first main load resistor and a base connected to the first supplementary load resistor, and a fourth transistor of said third differential pair of transistors has a base connected to the second supplementary load resistor;
• and
• a fourth differential pair of transistors controlled symmetrically with respect to the third differential pair of transistors, said fourth differential pair of transistors having linked emitters connected to the collector of the first transistor, said fourth differential pair of transistors comprising a fifth transistor having a collector connected to the second main load resistor and a base connected to the second supplementary load resistor, and a sixth transistor having a base connected to the first supplementary load resistor.

An integrated circuit for a receiver, said integrated circuit comprising an amplifier contained in a tuning circuit, a mixer circuit and an intermediate frequency preamplifier, wherein said tuning circuit comprises a local oscillator having a voltage-controlled frequency, said local oscillator comprising said amplifier coupled to a resonant circuit having variable capacitance and inductance, an output terminal of the amplifier being positively fed back to an input of the amplifier and to a terminal of the resonant circuit, the amplifier comprising a first stage having a first differential pair of bipolar transistors having linked emitters connected to a current source, said first differential pair of bipolar transistors comprising a first transistor having a base connected to an input terminal of the amplifier, and a second transistor having a collector coupled to a main load resistor, said main load resistor having one end connected to a power supply terminal and another end connected to an output terminal of the amplifier, characterized in that the amplifier further comprises a second stage having a second differential pair of transistors comprising a third transistor and a fourth transistor, said third and fourth transistors having linked emitters connected to the collector of the second transistor,

• and in that the main load resistor is connected to a collector of the third transistor, the third transistor having a base connected to one end of a supplementary load resistor, said supplementary load resistor being coupled to a collector of the first transistor, while a base of the fourth transistor is connected to a reference voltage.

A television receiver, characterized in that said television receiver includes a tuning circuit, wherein said tuning circuit comprises a local oscillator having a voltage-controlled frequency, said local oscillator comprising an amplifier coupled to a resonant circuit having variable capacitance and inductance, an output terminal of the amplifier being positively fed back to an input of the amplifier and to a terminal of the resonant circuit, the amplifier comprising a first stage having a first differential pair of bipolar transistors having linked emitters connected to a current source, said first differential pair of bipolar transistors comprising a first transistor having a base connected to an input terminal of the amplifier, and a second transistor having a collector coupled to a main load resistor, said main load resistor having one end connected to a power supply terminal and another end connected to an output terminal of the amplifier,

• characterized in that the amplifier further comprises a second stage having a second differential pair of transistors comprising a third transistor and a fourth transistor, said third and fourth transistors having linked emitters connected to the collector of the second transistor,
• and in that the main load resistor is connected to a collector of the third transistor, the third transistor having a base connected to one end of a supplementary load resistor, said supplementary load resistor being coupled to a collector of the first transistor, while a base of the fourth transistor is connected to a reference voltage.