Symbol timing recovery circuit and method

A symbol timing recovery circuit of a digital television in which one segment signal has a synchronizing signal of first to fourth symbols and data of 828 symbols, said first and fourth synchronizing symbols are transmitted with a first signal level, and said second and third synchronizing symbols are transmitted with a second signal level, said symbol timing recovery circuit comprising:

• analog-to-digital converting means for sampling a received analog signal by a symbol clock to be converted to digital data;
• demodulating means for recovering a carrier wave, demodulating said digital data to a baseband signal and generating a segment signal;
• segment synchronizing signal detecting means for detecting a segment synchronizing signal from said segment signal;
• phase error detecting means for receiving said segment signal and detecting a phase error by a difference between said second and third synchronizing symbols, said phase error detecting means being activated by said segment synchronizing signal;
• and
• symbol clock phase adjusting means for adjusting the phase of said symbol clock according to said phase error of said synchronizing symbols to be supplied to said analog-to-digital converting means as said symbol clock.

A symbol timing recovery method of a digital television in which one segment signal has a synchronizing signal of first to fourth symbols and data of 828 symbols, said first and fourth synchronizing symbols are transmitted with a first signal level, and said second and third synchronizing symbols are transmitted with a second signal level, said symbol timing recovery method comprising the steps of:

• sampling a received analog signal by a symbol clock to be converted to digital data;
• recovering a carrier wave, demodulating said digital data to a baseband signal and generating a segment signal;
• detecting a segment synchronizing signal from said segment signal;
• detecting a phase error between said second and third synchronizing symbols by said segment synchronizing signal;
• and
• adjusting the phase of said symbol clock according to said phase error of said synchronizing symbols and supplying the phase-adjusted symbol clock to said sampling step.