Data processing system having display controller with bursting direct memory access

A data processing system, comprising:

• a central processing unit, coupled to a bus, for executing instructions retrieved from a memory, the central processing unit receiving a first clock signal at a first frequency;
• a liquid crystal display controller, coupled to the bus, the liquid crystal display controller comprising:
• a direct memory access controller for accessing the memory for retrieving display data, the direct memory access controller receiving a second clock signal at a second frequency that is different from the first frequency;
• a line buffer, coupled to the bus and to the direct memory access controller, for storing the display data retrieved from the memory, the display data for periodically refreshing a liquid crystal display screen;
• and
• a liquid crystal display control block, coupled to the line buffer, for receiving the display data and a third clock signal, the liquid crystal display control block for refreshing the liquid crystal display screen using the display data, wherein the third clock signal is provided at a third frequency different from the second frequency.

In a data processing system having a central processing unit, and a liquid crystal display controller for controlling a liquid crystal display, the central processing unit and liquid crystal display controller coupled to a bus, a method for periodically supplying display data for refreshing the liquid crystal display and instructions for execution by the central processing unit, the method comprising the steps of:

• requesting access to the bus;
• receiving access to the bus;
• enabling a system memory for a read access from the system memory;
• reading the display data from the system memory at a first frequency, the first frequency being different from an operating frequency of the central processing unit, wherein the display data being read from the system memory in a predetermined number of bursts;
• and
• writing the predetermined number of bursts of display data to a line buffer of the liquid crystal display controller;
• and
• using the display data in a display control block to refresh the display screen, the display control block operating at a second frequency different from the first frequency.