Data processor having an output terminal with selectable output impedances

A method for controlling output impedance of a circuit in an integrated circuit, comprising the steps of:

• providing a plurality of output buffers, each output buffer having a predetermined buffer output impedance;
• connecting each output buffer to an information input terminal of the circuit and directly connecting each output buffer to a common node which is coupled to an output terminal of the circuit;
• storing a control signal;
• providing each output buffer with a control terminal for receiving the control signal;
• and
• allowing a user of the circuit to select a value of the control signal to permit the user of the circuit to select one of a plurality of predetermined, discrete output impedance values for the output terminal of the circuit, the user being able only during a predetermined mode of operation of the integrated circuit to change an output impedance of the output terminal from a first substantially constant impedance to a second substantially constant impedance by modifying the value of the control signal in response to providing a select signal at an input pin of the integrated circuit, the output terminal of the circuit fully changing between a logic low state and a logic high state in response to an input signal inputted to the information input terminal.