Methods of forming combined trench and locos-based electrical isolation regions in semiconductor substrates

Abstract

Methods of forming electrical isolation regions in semiconductor substrates include the steps of forming a first electrical isolation region at a face of a semiconductor substrate, then forming a trench in the semiconductor substrate, laterally adjacent the first electrical isolation region, and then forming a trench isolation region in the trench so that the trench isolation region is contiguous with the first isolation region. In particular, these methods include the steps of forming a pad insulating layer on the face of a semiconductor substrate and then forming a first nitride layer on the pad insulating layer. The first nitride layer is then patterned by removing a portion thereof to define an opening extending opposite an inactive region within the semiconductor substrate. A second nitride layer is then formed on the patterned first nitride layer and in the opening. The second nitride layer is then patterned within the opening by removing a portion thereof extending opposite a portion of the inactive region. The second nitride layer is then used as a mask to selectively form a first isolation region by thermally oxidizing the substrate. The second nitride layer is then removed and followed by the step of etching a laterally adjacent portion of the inactive region to form a trench. The trench is then filled by depositing an oxide layer in the trench and on the first isolation region. Chemical-mechanical polishing is then performed to planarize the deposited oxide layer and the first isolation region and form a single composite isolation region therefrom. Stable isolation characteristics can therefore be obtained because the above sequence of steps reduces the degree of dishing associated with the composite isolation region, even when relatively wide trenches are used for isolation.

Dependencies are inferred from the claim text.