Hybrid chip and method therefor

A method for co-locating, on a common semiconductor substrate, first and second devices having different multiple epitaxial layer structures, comprising the steps of

• depositing a first stop-etch layer on a first substrate, forming the first device at a first location on the first stop-etch layer, and removing said first stop-etch layer from the first substrate at locations other than the first location, wherein, the first device comprises a first contact pad located distal to the first stop-etch layer;
• depositing a second stop-etch layer on a second substrate, forming the second device at a second location on the second stop-etch layer and removing said second stop-etch layer from the second substrate at locations other than the second location wherein, the second device comprises a second contact pad located distal to the second stop-etch layer;
• bonding the first device to the common semiconductor substrate such that, relative to said first stop-etch layer, the first contact pad is proximal to said common semiconductor substrate;
• flowing a flowable hardener around the first device;
• removing the first substrate;
• removing the flowable hardener;
• bonding the second device to the common semiconductor substrate such that, relative to said second stop-etch layer, the second contact pad is proximal to said common semiconductor substrate, and, relative to the second stop-etch layer, the first stop-etch layer is relatively nearer to the common semiconductor substrate so that a gap is defined between the first stop-etch layer and the second substrate;
• and
• flowing the flowable hardener around the first and the second device.