Demountable and repairable low pitch interconnect for stacked multichip modules

An electrical interconnection comprising:

• an electrically insulating interconnect support having a pair of opposed major surfaces and a side surface;
• an electrical connection site comprising a channel formed in said side surface and lined with an electrically conductive layer electrically connected to circuitry;
• and
• a connection element comprising an elongated electrically conductive core coated with a layer of elastomeric material containing conductive particles, at least a portion of said connection element being located within said channel;
• a compression element pressed against said connection element to enhance electrical connection between said conductive particles, said core and said channel, said compression element comprising a printed circuit board including an electrically conductive via hole pressed against said connection element to establish an electrical connection with said via hole.

An electrical interconnection comprising:

• an electrically insulating interconnect sup port having a pair of opposed major surfaces and a side surface, said interconnect support comprising a circuit substrate supporting circuitry;
• an electrical connection site comprising a channel formed in said side surface and lined with an electrically conductive layer electrically connected to the circuitry;
• and
• a connection element comprising an elongated electrically conductive core coated with a layer of elastomeric material containing conductive particles, at least a portion of said connection element being located within said channel;
• a compression element pressed against said connection element to enhance electrical connection between said conductive particles, said core and said channel;
• said compression element comprising another electrically insulating circuit substrate having a pair of opposed major surfaces and a side surface, with a channel formed in said side surface and lined with an electrically conductive layer electrically connected to circuitry supported by said another substrate, said channel of said another substrate being pressed against said connection element to establish an electrical connection.

A stack comprising:

• a plurality of electronic modules in a stacked configuration, each module including a respective interconnect support having a pair of opposed major surfaces and a side surface, and each of said modules including circuitry;
• electrical connection sites on the side surface of each of said interconnect supports comprising aligned electrical connection sites on a side of said stacked configuration of said plurality of modules, said electrical connection sites on each of said interconnect supports, respectively, comprising a channel formed in the respective side surface extending between said opposed major surface of a respective interconnect supports lined with an electrically conductive layer electrically connected to said circuitry included in each of said modules, respectively;
• and
• a plurality of connection elements, each comprising an elongated electrically conductive core coated with a layer of elastomeric material containing conductive particles, located within said channels and extending between aligned electrical connection sites on said side of said stacked configuration to interconnect said modules.

An electrical interconnection comprising:

• a pair of electrically insulating circuit modules each having upper and lower opposed major surfaces;
• a channel formed in the upper surface of one of said modules and lined with an electrically conductive layer, and a corresponding channel formed in the lower surface of the other of said modules and lined with another electrically conductive layer;
• and
• a connection element comprising an elongated electrically conductive core coated with a layer of elastomeric material containing conductive particles;
• said circuit modules begin pressed together with said connection element engaging said channels to electrically connect said electrically conductive layers.

A method for forming an electrical interconnection, said method comprising:

• providing an electrically insulating circuit substrate having a pair of opposed major surfaces and a side surface;
• forming a channel in the substrate side surface between the major surfaces;
• lining the channel with an electrically conductive layer;
• providing circuitry on one surface of the major surfaces, wherein lining the channel and providing circuitry include electrically connecting the channel and the circuitry;
• providing a connection element including an elongated electrically conductive core coated with a layer of elastomeric material containing conductive particles;
• and
• inserting at least a portion of the connection element into the channel;
• and
• pressing a printed circuit board supporting a conductor against said connection element to establish an electrical connection with said circuit board conductor.

A method for forming an electrical interconnection, said method comprising:

• providing an electrically insulating circuit substrate having a pair of opposed major surfaces and a side surface;
• forming a channel in the substrate side surface between the major surfaces;
• lining the channel with an electrically conductive layer;
• providing circuitry on one surface of the major surfaces, wherein lining the channel and providing circuitry include electrically connecting the channel and the circuitry;
• providing a connection element including an elongated electrically conductive core coated with a layer of elastomeric material containing conductive particles;
• and inserting at least a portion of the connection element into the channel;
• and
• pressing a printed circuit board including an electrically conductive via hole against the connection element to establish an electrical connection with the via hole.

A method for forming an electrical interconnection, said method comprising:

• providing an electrically insulating circuit substrate having a pair of opposed major surfaces and a side surface;
• forming a channel in the substrate side surface between the major surfaces;
• lining the channel with an electrically conductive layer;
• providing circuitry on one surface of the major surfaces, wherein lining the channel and;
• providing circuitry include electrically connecting the channel and the circuitry
• providing a connection element including an elongated electrically conductive core coated with a layer of elastomeric material containing conductive particles;
• inserting at least a portion of the connection element into the channel;
• and
• providing another electrically insulting circuit substrate supporting circuitry, having a pair of opposed major surfaces and a side surface, and having a channel formed in the side surface between the major surfaces and lined with an electrically conductive layer electrically connected to the circuitry;
• and
• pressing the channel of the another electrically insulating circuit substrate against the connection element to establish an electrical connection.

A method for interconnecting integrated circuits, comprising the steps of:

• providing a plurality of electrically insulating substrates, each respective substrate having a respective pair of opposed major surfaces, a respective side surface, and at least one respective integrated circuit thereon;
• providing respective electrical connection sites on the side surface of each of the substrates by forming respective channels in the substrate side surfaces between the major surfaces and lined with electrically conductive layers electrically connected to the respective integrated circuits;
• stacking the substrates in a vertical configuration with the electrical connection site channels of the respective substrates in alignment;
• providing a connection element including an elongated electrically conductive core coated with a layer of elastomeric material containing conductive particles;
• and
• inserting the connection element into the aligned connection site channels to establish electrical connections.

An electrical interconnection comprising:

• an electrically insulating interconnect support having a pair of opposed major surfaces and a side surface;
• an electrical connection site comprising a channel formed in said side surface and lined with an electrically conductive layer electrically connected to circuitry;
• and
• a connection element comprising an elongated electrically conductive core coated with a layer of elastomeric material containing conductive particles, at least a portion of said connection element being located within said channel, the connection element being adapted to provide a constant impedance connection to the electrically conductive layer.