Multiprocessor system assigning system function to each processor in accordance with delay function and maintaining the system function assignment after the system is rebooted

A system with multiple processors, said system having a backplane for accommodating said multiple processors, no position being dedicated to a specific process and no processor being uniquely assigned a system function, said system comprising:

• means for providing each processor with a different qualification identifier, and
• means for assigning each processor a different system function in accordance with the qualification identifier provided the processor, and for maintaining the assigned system function to each processor after said system is rebooted.

In a system with multiple processors, said system having a backplane for accommodating said multiple processors, no position being dedicated to a specific process and no processor being uniquely assigned a system function, a method for assigning system functions to the processors of said system comprising:

• providing each processor with a different delay function,
• assigning each processor a different system function in accordance with the delay function provided the processor, and
• maintaining the assigned system function to each processor after said system is rebooted.

In a system with multiple processors, said system having a backplane for accommodating said multiple processors no position being dedicated to a specific process and no processor being uniquely assigned a system function, a method for associating each processor with a system function comprising:

• providing each processor with a different qualification identifier,
• assigning each processor a different system function in accordance with the qualification identifier provided the processor, and
• maintaining the assigned system function to each processor after said system is rebooted.

An integrated network switch system with multiple processors, said system having a VME type common bus on a backplane for accommodating said multiple processors, no position being dedicated to a specific process and no processor being uniquely assigned a system function, said system comprising:

• means for providing each processor with a different delay function, and
• means for assigning each processor a different system function in accordance with the delay function provided the processorand for maintaining said assigned system function to each processor after said system is rebooted.

An integrated network switch system with multiple processors, said system having a VME type common bus on a backplane for accommodating said multiple processors, no position being dedicated to a specific process and no processor being uniquely assigned a system function, said system comprising:

• means for providing each processor with a different qualification identifier without programming identification information into the processors, and
• means for assigning each processor a different system function in accordance with the qualification identifier provided the processor and for maintaining said assigned system function to each processor after said system is rebooted.