Machine and method for simulating a processor-based digital system
AssigneeSiemens Business Communication Systems, Inc.
InventorsNeufito L. Fernandes, Kenneth J. Duda, Alfred Platt
Life of this patent
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Abstract
A machine and method for allowing a simulated processor environment to interact with a simulated digital environment to simulate a processor-based system. Embodiments of the present invention contemplate that interaction between the processor environment and digital environment can be implemented by providing the processor environment with a list of "significant events" (e.g., reads and writes) that are pertinent to the digital environment. Embodiments of the present invention also contemplate that the processor environment and digital environment can be synchronized by allowing operations to occur on either the processor environment or the digital environment, but not on both simultaneously.
Claims20
A machine for testing a hypothetical system containing a processor and a digital device, the machine comprising:
- a simulation environment having a processor simulator and a digital environment, said digital environment emulating one or more pieces of digital hardware, said processor simulator and said digital environment processing independently of each other;
- and
- a significant event identifier to identify to the processor simulator one or more events that are significant to the digital environment,
- wherein said one or more events contain associated event information;
- interface means for conveying, to the digital environment, said event information from an instruction-oriented format to a bus signal format,
- wherein the digital environment receives and processes said event information, generating an event result,
- said interface means conveying said event result to the processor simulator.
A machine for testing a hypothetical system containing a processor and a digital device, the machine comprising:
- a simulation environment having a processor simulator and a digital environment, said digital environment emulating one or more pieces of digital hardware, said processor simulator and said digital environment processing independently of each other;
- and
- a significant event identifier to identify to the processor simulator one or more events that are significant to the digital environment,
- wherein said one or more events contain associated event information;
- a digital simulator interface for conveying, to the digital environment, said event information,
- wherein the digital environment receives and processes said event information, generating an event result;
- and
- a processor simulator interface for conveying said event result to the processor simulator,
- wherein said digital simulator and said processor simulator translate said event information from an instruction-oriented format to a bus signal format, and vice versa.
A machine for testing a hypothetical system containing a processor and a digital device, the machine comprising:
- a simulation environment having a processor simulator and a digital environment, said digital environment emulating one or more pieces of digital hardware, said processor simulator and said digital environment processing independently of each other;
- and
- a significant event identifier to identify to the processor simulator one or more events that are significant to the digital environment,
- wherein said one or more events contain associated event information;
- processor interface means for conveying, to the digital environment, said event information;
- digital interface means, for receiving said event information from said processor interface means,
- wherein said event information is translated from an instruction-oriented format to a bus signal format;
- digital resumption means, responsive to said digital interface means, for initiating or resuming activity on the digital environment,
- wherein the digital environment receives and processes said event information from said digital interface means, generating an event result,
- said interface means conveying said event result to the processor simulator through said digital interface means;
- and
- digital suspension means, responsive to said digital interface means, for suspending activity on the digital environment.
A procedure for testing a hypothetical system containing a processor and a digital device, wherein the process utilizes a simulation environment having a processor simulator and a digital environment running as independent processes, comprising the steps of:
- (1) identifying one or more events that are significant to the digital environment, wherein said one or more events contains associated event information;
- (2) conveying, to the digital environment, said event information of said step (1);
- (3) translating said event information conveyed by said step (2) from an instruction-oriented format to a bus signal format,
- wherein the digital environment receives and processes said event information, generating an event result;
- (4) conveying said event result of said step (3) to the processor simulator.
Dependencies are inferred from the claim text.