Method and apparatus for correlating a continuous phase modulated spread spectrum signal

An apparatus for despreading a continuous phase modulated spread spectrum signal comprising:

• a signal divider coupled to a received continuous phase modulated spread spectrum signal, said signal divider separating said spread spectrum signal into first and second duplicate signals, said spread spectrum signal generated by superposing a first transmitter signal derived from transitions between odd chips in a spreading code and a second transmitter signal derived from transitions between even chips in said spreading code, said odd chips comprising a plurality of odd preamble chips and a plurality of odd non-preamble chips, and said even chips comprising a plurality of even preamble chips and a plurality of even non-preamble chips,
• a first demodulator coupled to said first signal and outputting a first demodulated signal,
• a second demodulator coupled to said second signal and outputting a second demodulated signal,
• a synchronization circuit, said synchronizing circuit comprising
• a first even/odd shift register having as an input said first demodulated signal and having a plurality of odd chip locations, said first even/odd shift register having outputs located at every odd chip location and at every even chip location,
• a second even/odd shift register having as an input said second demodulated signal and having a plurality of odd chip locations, said second even/odd shift register having outputs located at every odd chip location and at every even chip location,
• a first matched code filter having as inputs said outputs of every other odd chip location of said first even/odd shift register, for correlation with said odd preamble chips, said first matched code filter outputting a first correlation signal,
• a second matched code filter having as inputs said outputs of every other odd chip location of said second even/odd shift register, for correlation with said odd preamble chips, said second matched code filter outputting a second correlation signal,
• a third matched code filter having as inputs said outputs of every other even chip location of said second even/odd shift register, for correlation with said even preamble chips, said third matched code filter outputting a third correlation signal,
• a fourth matched code filter having as inputs said outputs of every other even chip location of said first even/odd shift register, for correlation with said even preamble chips, said fourth matched code filter outputting a fourth correlation signal,
• a first adder having as inputs said first correlation signal and said third correlation signal, said first adder outputting a first intermediate preamble correlation signal,
• a second adder having as inputs said second correlation signal and said fourth correlation signal, said second adder outputting a second intermediate preamble correlation signal,
• a combining circuit having as inputs said first intermediate preamble correlation signal and said second intermediate correlation signal, said combining circuit outputting a unified preamble correlation signal,
• a comparator having as inputs said unified preamble correlation signal and a threshold signal, said comparator outputting a serial correlation synchronization signal when said unified preamble correlation signal exceeds said threshold signal, and
• a clock synchronizer connected to said serial correlation synchronization signal, said clock synchronizer outputting a serial correlator clock signal,
• a first serial correlator circuit coupled to said first demodulated signal and to a locally generated signal representing said spreading code, said first serial correlator circuit clocked using said serial correlator clock signal and outputting a first odd correlation count and a first even correlation count, said first odd correlation count indicative of a level of correlation of said first demodulated signal with said odd non-preamble chips, and said first even correlation count indicative of a level of correlation of said first demodulated signal with an inverse of said even non-preamble chips,
• a second serial correlator circuit coupled to said second sequence and to a locally generated signal representing said spreading code, said second serial correlator circuit clocked using said serial correlator clock signal and outputting a second odd correlation count and a second even correlation count, said second odd correlation count indicative of a level of correlation of said second demodulated signal with said odd non-preamble chips, and said second even correlation count indicative of a level of correlation of said second demodulated signal with said even non-preamble chips, and
• a combiner coupled to said first odd correlation count, said second odd correlation count, said first even correlation count, and said second even correlation count, said combiner outputting a unified correlation signal.