Disc data reproducing apparatus and signal processing circuit
AssigneeKabushiki Kaisha Toshiba
InventorsJun Inagawa, Yasuhiro Hayashi, Hiroshi Kobata
Life of this patent
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Abstract
An apparatus, a signal processing circuit and a method for reproducing data stored on a disc to prevent a buffer memory from experiencing overflow/underflow. Writing information data read from the disc to the buffer memory is performed in response to a reproduction stage clock, and reading from the buffer memory is in response to a signal processing stage clock. The signal processing stage clock for reading information data may be derived from the reproduction stage clock.
Claims9
Apparatus for reproducing data stored on a disc, comprising:
- means for rotating the disc;
- pickup means for reading out disc data from the disc during rotation thereof;
- means for generating a digitized signal by quantizing the read out disc data in accordance with rotation of the disc;
- means for generating a reproduction reference clock responsive to the digitized signal;
- means for supplying an oscillator clock at a predetermined frequency;
- means for demodulating the digitized signal in response to the first clock and for outputting demodulated data;
- means for storing the demodulated data;
- memory controlling means for controlling a writing operation to the storing means in response to the reproduction reference clock;
- means for detecting the frequency of the reproduction reference clock in accordance with the constant clock, and
- means for determining the demodulated data as invalid when the detected frequency is out of a predetermined range.
A signal processing circuit for use in processing information data read from a rotating disc for storage in a buffer memory, comprising:
- a clock generating circuit to generate a first clock responsive to a modulated signal generated by quantizing the information data in accordance with a disc rotation;
- a demodulator to demodulate the modulated signal in response to the first clock and to output demodulated data;
- a second clock generating circuit to generate a second clock and to output the second clock as a reference clock;
- a memory controlling circuit to control writing of the demodulated data to the buffer memory in response to the first clock and to control reading of the demodulated data from the buffer memory in response to the reference clock;
- a detector to detect a frequency of the first reference clock in accordance with a constant clock;
- and
- a determining circuit to determine the demodulated data as invalid when the detected frequency is out of a predetermined range.
A method for reproducing data stored on a disc, comprising:
- reading out disc data from a rotating disc;
- generating a digitized signal by quantizing the read out the disc data in accordance with a rotation of the disc;
- generating a reproduction reference clock responsive to the digitized signal;
- demodulating the digitized signal in response to the reproduction reference clock;
- writing the demodulated data to a buffer memory in response to the reproduction reference clock
- reading the demodulated data from the buffer memory in response to a read-out reference clock;
- detecting a frequency of the reproduction reference clock in accordance with a constant clock, and
- determining the demodulated data as invalid when the detected frequency is out of a predetermined range.
A signal processing circuit for use in processing data read from a rotating disc, the processing circuit comprising:
- a reproduction reference clock circuit for generating a reproduction reference clock signal in response to a modulated signal obtained by quantizing the data;
- a correction circuit for correcting errors in the data read from the disc;
- a speed detection circuit for detecting a speed of the reproduction reference clock signal based on a constant clock signal, the speed detection circuit outputting a result of the detection;
- and
- a data invalidating circuit for invalidating the data read from the rotating disc irrespective of a result of operation of the error correction circuit.
Dependencies are inferred from the claim text.