Earth leakage breaker
AssigneeFuji Electric Co., Ltd.
InventorsTakashi Hashimoto, Kiyoshi Tanigawa, Shoji Sasaki, Katsumi Watanabe
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AssigneeFuji Electric Co., Ltd.
InventorsTakashi Hashimoto, Kiyoshi Tanigawa, Shoji Sasaki, Katsumi Watanabe
Estimating the term…
The earth leakage breaker of the invention includes a first comparator; a second comparator connected to the first comparator; a third comparator having a threshold higher than the threshold of the first comparator for distinguishing a leakage current from the grounding current caused by a lightning surge or by the heavy ground fault; a monostable multivibrator triggered by the output of the third comparator for forming a time gate of a predetermined period; a counter for detecting a pulse outputted from the first comparator to distinguish whether the grounding current is caused by the lightning surge or by the heavy ground fault; and a trip signal generator circuit for outputting a trip signal in the case of leakage and heavy ground fault. The earth leakage breaker facilitates avoiding unnecessary breaking of the impulsive grounding current caused by the lightning surge.
An earth leakage breaker having main circuit conductors comprising:
An earth leakage breaker having main circuit conductors comprising:
An earth leakage breaker having main circuit conductors comprising:
An earth leakage breaker having main circuit conductors comprising:
An earth leakage breaker having main circuit conductors comprising:
Dependencies are inferred from the claim text.
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No related US applications are recorded in the indexed filing history.
Involving comparison of the voltage or current values at corresponding points in different conductors of a single system, e.g. of currents in go…:…
Details of emergency protective circuit arrangements: arrangements for preventing response to transient abnormal conditions, e.g. to lightning or…
Emergency protective circuit arrangements
Term ended 8 Jul 2017 (estimated)
USPTO file history isn’t available for this patent, so only indexed dates are shown.
The present invention relates to an earth leakage breaker. More specifically, the present invention relates to an earth leakage breaker that facilitates avoiding unnecessary break caused by lightning surge.
FIG. 16 is a block diagram of a conventional earth leakage breaker. FIG. 17 is a time chart of the outputs from the constituent devices of the conventional earth leakage breaker of FIG. 16. Referring now to FIGS. 16 and 17, a secondary current is generated in a secondary winding of a zero-phase current transformer 3 (hereinafter referred to as a "ZCT") wound around main circuit conductors 2 of an earth leakage breaker 1 when a leakage current or a grounding current caused by lightning surge flows in the main circuit conductors 2. The secondary current is converted to a voltage signal by a resistor 4. The voltage signal is amplified by an amplifier 6 after impulsive noise or high frequency leakage current components on the secondary side of an inverter are removed from the voltage signal by a low-pass filter 5. The output of the amplifier 6 is resolved to positive and negative pulses by the threshold of a first comparator 7. The positive and negative pulses are synthesized in an OR circuit (OR1). The output of the first comparator 7 through the OR circuit (OR1) is integrated in an integrator circuit 8. When the output of the integrator circuit 8 exceeds the threshold of a second comparator 9, a trip-signal generator circuit 10 feeds a trip signal .gamma. to a trip coil 11 based on the output .alpha. of the second comparator 9 to trip the earth leakage breaker 1.
The breaking period of the high-speed earth leakage breaker is specified to be within 40 ms by the IEC specification for protecting the human body. Since it usually takes about 23 ms at the maximum for the earth leakage breaker to operate mechanically, 40-23=17 ms is left for the judging period until feeding the trip signal to the trip coil. If the period during which the output of the amplifier 6 exceeds the threshold of the first comparator 7 described in FIG. 17, i.e. the pulse width of the output of the first comparator 7, is set at 7 ms and the pulse interval at 3 ms, the total pulse width necessary to output the trip signal .gamma. within the foregoing 17 sec., i.e. the integration period of the integrator circuit 8, will be 17-3=14 ms.
FIG. 1 is a block diagram of a first embodiment of an earth leakage breaker according to the invention;
FIG. 2 is a time chart of the outputs from the constituent devices of the earth leakage breaker of FIG. 1;
FIG. 3 is another time chart of the outputs from the constituent devices of the earth leakage breaker of FIG. 1;
Now the present invention will be explained hereinafter with reference to the accompanied drawings which illustrate the preferred embodiments of the invention. In the following drawings, constituent devices similar to those of the conventional earth leakage breaker are designated by the same reference numerals.
FIG. 1 is a block diagram of a first embodiment of an earth leakage breaker according to the invention. FIG. 2 is a time chart of the outputs from the constituent devices of the earth leakage breaker of FIG. 1. FIG. 3 is another time chart of the outputs from the constituent devices of the earth leakage breaker of FIG. 1.
Referring now to FIGS. 1 and 2, a secondary current is generated in a secondary winding of a ZCT 3 wound around main conductors 2 when a leakage current of, e.g., 15 mA, flows in the main conductors 2. The secondary current is converted to a voltage signal by a resistor 4. The voltage signal is amplified by an amplifier 6 after the voltage signal passes a low-pass filter 5. The output of the amplifier 6 is resolved, e.g. at the commercial frequency of 50 Hz, to the positive and negative pulses of 7 ms in the pulse width and 3 ms in the pulse interval by the threshold of the first comparator 7 (1st detection level) set for converting the voltage signal corresponding to the foregoing 15 mA to the pulse signal. The positive and negative pulses are synthesized in an OR circuit (OR1). An integrator circuit 8 is charged up with the output of the OR circuit (OR1), wherein the charge-up time constant of the integrator circuit 8 is set such that the total pulse width of, e.g., 14 ms or more, will exceed the threshold of the second comparator 9 (2nd detection level), and the output .alpha. of the second comparator 9 is set to be "H".