Clamping system and method for clamping floating point color values from a geometry accelerator in a computer graphics system

A clamping system for clamping floating point values from a geometry accelerator in a computer graphics system, comprising:

• a register configured to receive a floating point value from a connection to said geometry accelerator;
• an output mechanism configured to output onto said connection one of a first threshold value, a second threshold value, and a floating point value;
• and
• logic configured to evaluate said floating point value received by said register, said logic configured to control said output mechanism to output said first threshold value when said floating point value is less than or equal to said first threshold value, to output said second threshold value when said floating point value is greater than or equal to said second threshold value, and to output said floating point value when said floating point value is between said first and second threshold values.

A system for clamping floating point values from a geometry accelerator in a computer graphics system, comprising:

• a register electrically coupled to a bus, said register inputting a floating point value from said bus;
• a network of interconnected logic gates coupled to said register;
• a multiplexer having a selection input coupled to an output of said network of interconnected logic gates and an output coupled to said bus;
• a first threshold value applied to a first input of said multiplexer;
• a second threshold value applied to a second input of said multiplexer;
• said floating point value being applied to a third input of said multiplexer;
• and
• wherein said network of interconnected logic gates is configured to apply a signal to said selection input enabling said multiplexer to output onto said bus (a) said first threshold value when said floating point value is less than or equal to said first threshold value, (b) said second threshold value when said floating point value is greater than or equal to said second threshold value, and, (c) said floating point value when said floating point value is between said first and second threshold values.

A system for clamping floating point values from a geometry accelerator in a computer graphics system, comprising:

• a first means for inputting a floating point value from a bus;
• a second means for determining whether the floating point value is less than or equal to a first threshold value;
• a third means for determining whether said floating point value is greater than or equal to a second threshold value;
• a fourth means for determining whether said floating point value is between said first and second threshold values;
• a fifth means for outputting said first threshold value onto said bus when said floating point value is less than or equal to said first threshold value, said second threshold value onto said bus when said floating point value is greater than or equal to said second threshold value, and said floating point value onto said bus when said floating point value is between said first and second threshold values.

A method for clamping floating point values in a geometry accelerator in a computer graphics system comprising the steps of

• applying a floating point value from a bus to a network of interconnected logic gates coupled to said bus;
• generating a first output signal in said network of interconnected logic gates when said floating point value is less than or equal to a first threshold value and applying said first output signal to an output mechanism coupled to said network of interconnected logic gates;
• generating a second output signal in said network of interconnected logic gates indicating that said floating point value is greater than or equal to a second threshold value and applying said second output signal to said output mechanism;
• generating a third output signal in said network of interconnected logic gates indicating that said floating point value is between said first and second threshold values and applying said third output signal to said output mechanism;
• outputting said first threshold value onto said bus from said output mechanism in response to said first output signal;
• outputting said second threshold value onto said bus from said output mechanism in response to said second output signal;
• and
• outputting said floating point value onto said bus from said output mechanism in response to said third output signal.