Mechanism to improved execution of misaligned loads

A method of executing a load request comprising the steps of:

• (a) receiving a load request to load a value from a first memory location;
• (b) testing an entry in a store buffer to determine whether the entry corresponds to the first memory location;
• (c) testing the entry to determine whether the entry corresponds a second memory location prior to the first memory location;
• (d) testing the entry to determine whether the entry corresponds to a third memory location subsequent to the first memory location;
• (e) if the entry corresponds to the first memory location then blocking the load request;
• (f) if the entry corresponds to the second memory location and the entry is a misaligned store then blocking the load request;
• (g) if the entry corresponds to the third memory location and the load request is a misaligned load request then blocking the load request.

A processor comprising:

• a load buffer containing an entry received in conjunction with a load request, the entry comprising a load request address and a plurality of block indication bits;
• an incrementing circuit that generates an incremented load request address;
• a decrementing circuit that generates a decremented load request address;
• a store buffer containing a portion of a store request address, the store buffer comprising a first, second, and third content addressable memories that detect a conflict between the store request address and at least one of the load request address, the incremented load request address, and the decremented load request address, and generate a blocking signal if the conflict is detected;
• a control circuit coupled to receive the blocking signal and to alter said plurality of load block indication bits.

A processor comprising:

• means for storing a load request, the load request including a load request address;
• means for incrementing the load request address to generate an incremented address;
• means for storing a store request, the store request including a portion of a store request address;
• first means for comparing the store request address to the load request address and generating a blocking signal if the store request address matches the load request address;
• second means for comparing the store request address to the incremented address and generating the blocking signal if the store request address matches the incremented address.