Microcomputer for digital signal processing having on-chip memory and external memory access

A microcomputer for processing comprising:

• a semiconductor substrate having terminals for connecting to external circuitry;
• a first bus extending across a portion of said semiconductor substrate and including plural conductors operative to carry data bits in parallel;
• a data memory connected to said first bus and located on said semiconductor substrate;
• a second bus including plural conductors for carrying address bits in parallel and for connection to said external circuitry by said terminals;
• an instruction memory connected to said second bus and located on said semiconductor substrate;
• a third bus including plural conductors for carrying bits in parallel and for connection to said external circuitry by said terminals separate from said second bus;
• a hardware multiplier and an arithmetic logic unit, both located on said semiconductor substrate and both having inputs and outputs interconnected with each other and said first bus;
• and
• a control circuit located on said semiconductor substrate and coupled to said memories, said hardware multiplier and said arithmetic logic unit, and wherein said control circuit has a first mode and a second mode and includes an input for receiving a mode signal for selecting between said first mode and second mode, and said control circuit in said first mode sends an address to access said instruction memory for an instruction and decodes said instruction and in said second mode sends said address to said second bus independent of said first and third busses and receives from said third bus any externally supplied instruction, instead of accessing said instruction memory.