Multi-level architecture for optical time delays in integrated circuits

An optical time delay structure in an integrated optical circuit comprising:

• (a) a first plurality of optical delay loops in a substantially spiral shape in a first layer of optical waveguide material;
• (b) a plurality of additional optical delay loops in a substantially spiral shape in a second layer of optical waveguide material adjacent to said first optical waveguide layer, wherein a substantial portion of said second delay loop occupies a plane vertically adjacent to said first delay loop and in at least one region said second delay loop crosses over said first delay loop;
• and
• (c) a vertical coupler connecting said first plurality of delay loops to said additional plurality of delay loops, such that a signal can be coupled to the second delay loop subsequent to traversing said first delay loop.

A method for implementing an optical time delay in an integrated optical circuit, said method comprising:

• (a) forming a first delay loop in a first layer of optical waveguide;
• (b) forming a second delay loop in a second optical waveguide stacked on said first optical waveguide, wherein a substantial portion of said second delay loop occupies a plane vertically adjacent to said first delay loop and in at least one region said second delay loop crosses over said first delay loop;
• and
• (c) coupling a signal to said second delay loop with a vertical coupler subsequent to traversing said first delay loop.

A method for implementing an optical time delay in an integrated optical circuit, said method comprising:

• (a) forming a plurality of delay loops in a substantially spiral shape in a first layer of optical waveguide;
• (b) forming a plurality of additional delay loops in a substantially spiral shape in a second layer of optical waveguide stacked on said first optical waveguide, wherein a substantial portion of said second delay loop occupies a plane vertically adjacent to said first delay loop and in at least one region said second delay loop crosses over said first delay loop;
• and
• (c) coupling a signal to said additional delay loops with a vertical coupler subsequent to traversing said first layer delay loops.