Protection circuit for redundancy register set-up cells of electrically programmable non-volatile memory devices

Abstract

A protection circuit for electrically programmable non-volatile memory cells includes at least one first control circuit connected between first and second voltage references and having at least an input terminal and an output terminal wherein the output terminal delivers a reading/programming voltage signal to the cells. The protection circuit also includes at least one second control circuit having a first input terminal for receiving an enabling control signal, a second input terminal for receiving a Power-on-Reset signal, and an output terminal for supplying a control signal to the first input terminal of the first control circuit. The protection circuit further includes a disabling circuit connected between the first and the second voltage reference and having an output terminal connected to the first input terminal of the first control circuit. The disabling circuit comprises at least one redundant memory element connected between a translated voltage reference and the second voltage reference.

Dependencies are inferred from the claim text.