Semiconductor package including heat sink with layered conductive plate and non-conductive tape bonding to leads

A semiconductor package comprising:

• a semiconductor chip integrated with an electronic circuit;
• a heat sink having an upper surface on which the semiconductor chip is centrally attached by an epoxy resin layer coated on the upper surface, the heat sink being provided with an oxidation layer formed on the upper surface thereof;
• a plurality of leads attached to opposite lateral end portions of the upper surface of the heat sink by non-conductive bonding tapes, respectively, the leads serving to transmit signals from the semiconductor chip to the outside of the package;
• wires for electrically connecting the semiconductor chip to the leads respectively;
• a plane comprised of a conductive thin plate and bonded between the heat sink and the leads at each lateral end portion of the heat sink by a non-conductive tape to provide a ground bonding area or a power bonding area;
• a sealing resin molded on the semiconductor chip and peripheral elements thereof in order to protect them from external oxidation and erosion;
• and
• wherein the plane is formed with oxidation films on upper and lower surfaces thereof, respectively.

A semiconductor package comprising:

• a semiconductor chip integrated with an electronic circuit;
• a heat sink having an upper surface on which the semiconductor chip is centrally attached by an epoxy resin layer coated on the upper surface, the heat sink being provided with an oxidation layer formed on the upper surface thereof;
• a plurality of leads attached to opposite lateral end portions of the upper surface of the heat sink by non-conductive bonding tapes, respectively, serving to transmit signals from the semiconductor chip to the outside of the package;
• wires for electrically connecting the semiconductor chip to the leads, respectively;
• a plane comprised of a conductive thin plate and bonded between the heat sink and the leads at each lateral end portion of the heat sink by a non-conductive tape to provide a ground bonding area or a power bonding area;
• a sealing resin molded on the semiconductor chip and peripheral elements thereof in order to protect them from external oxidation and erosion;
• and
• wherein the plane is plated with a double layer consisting of a nickel layer and a palladium layer formed over the nickel layer on a portion of the upper surface thereof corresponding to a wire bonding region.

A semiconductor package comprising:

• a semiconductor chip integrated with an electronic circuit;
• a heat sink having an upper surface on which the semiconductor chip is centrally attached by an epoxy resin layer coated on the upper surface, the heat sink being provided with an oxidation layer formed on the upper surface thereof;
• a plurality of leads attached to opposite lateral end portions of the upper surface of the heat sink by non-conductive bonding tapes, respectively, serving to transmit signals from the semiconductor chip to the outside of the package;
• wires for electrically connecting the semiconductor chip to the leads, respectively;
• a plane comprised of a conductive thin plate and bonded between the heat sink and the leads at each lateral end portion of the heat sink by a non-conductive tape to provide a ground bonding area or a power bonding area;
• a sealing resin molded on the semiconductor chip and peripheral elements thereof in order to protect them from external oxidation and erosion;
• and
• wherein the heat sink is plated with a nickel layer on a lower surface thereof.

a semiconductor package comprising:

• a semiconductor chip integrated with an electronic circuit;
• a heat sink having an upper surface on which the semiconductor chip is centrally attached by an epoxy resin layer coated on the upper surface;
• a plurality of leads attached to opposite lateral end portions of the upper surface of the heat sink by bonding tapes, respectively, the leads serving to transmit signals from the semiconductor chip to the outside of the package;
• wires for electrically connecting the semiconductor chip to the leads, respectively;
• a sealing resin molded on the semiconductor chip and peripheral elements thereof in order to protect them from external oxidation and erosion;
• and
• an oxidation layer formed on a portion of the upper surface of the heat sink to which the semiconductor chip is attached, and a silver layer plated on the remaining upper surface portion of the heat sink, whereby an easy ground bonding and power bonding can be achieved.