Dynamic random access memory of a plurality of banks exhibiting high speed activation operation of sense amplifier

Abstract

The present invention also provides a dynamic random access memory device comprising a plurality of banks. Each of the banks includes a plurality of memory cell arrays. Each of the memory cell arrays is connected to a row address decoder and a sense amplifier which is connected to a sense amplifier driver circuit for supplying a sense amplifier activation signal to the sense amplifier so as to activate the sense amplifier. It is important that a pair of the sense amplifiers respectively provided in adjacent two banks has a connection control circuit which is capable of providing an electrical connection between the paired sense amplifiers respectively provided in the adjacent two banks. The connection control circuit operates to make the paired sense amplifiers electrically conductive to each other so that charges are supplied from first one of the paired sense amplifiers through the connection control circuit to second one of the paired sense amplifiers whereby the second one of the paired sense amplifiers is activated not only by the sense amplifier driver circuit but also with the charges supplied through the connection control circuit from the first one of the paired sense amplifiers, provided that the connection control circuit connects the pair of the sense amplifiers when the bank having the first one of the paired sense amplifiers has been previously selected and the bank having the second one of the paired sense amplifiers is currently selected.

Dependencies are inferred from the claim text.