Non-volatile storage device refresh time detector
AssigneeAdvanced Micro Devices, Inc.
InventorsLee E. Cleveland, Yuan Tang, Jonathan Su, Chi Chang, Chung K. Chang
Life of this patent
Estimating the term…
Abstract
A timing apparatus for monitoring when a memory array in a non-volatile storage device needs to be refreshed includes a programmable semiconductor device and detecting means for detecting when the amount of charge on the programmable semiconductor device has diminished to at most a threshold amount. In one embodiment, the programmable semiconductor device is a floating gate transistor programmed by adding charge to the floating gate. The detecting means monitors the I.sub.DS current of the transistor and determines an array refresh time when more than a negligible amount of I.sub.DS current is detected.
Claims27
A timing apparatus, comprising:
- a programmable semiconductor device, wherein said device is programmed by the addition of charge;
- a discharge detector, in electrical communication with said programmable semiconductor device, to detect when the amount of charge on said programmable semiconductor device has diminished to at most a threshold amount;
- and
- an output, in electrical communication with said discharge detector, for carrying a signal indicative of whether a second programmable semiconductor device needs to be refreshed.
A timing apparatus for use with a memory array, comprising:
- a transistor having a floating gate, a control gate, a source, and a drain, said transistor capable of being programmed by adding charge to said floating gate;
- discharge detecting means for detecting whether the amount of charge on said floating gate has diminished to at most a threshold amount;
- and
- an output, coupled to said discharge detecting means, for carrying a signal indicative of whether said memory array needs to be refreshed.
A nonvolatile storage system, comprising:
- a memory array including a plurality of programmable semiconductor devices for storing information, wherein said semiconductor devices are programmed by the addition of charge;
- an additional programmable semiconductor device, wherein said additional device is programmed by the addition of charge;
- a discharge detector, in electrical communication with said additional programmable semiconductor device, to detect when the amount of charge in said additional programmable semiconductor device has diminished to at most a threshold amount and to signal when said memory array needs to be refreshed.
A method of determining when a memory array needs to be refreshed, wherein said memory array includes a plurality of programmable semiconductor devices, comprising the steps of:
- programming an additional programmable semiconductor device, wherein said additional programmable semiconductor device is separate from said plurality of programmable semiconductor devices, wherein said additional programmable semiconductor device includes a transistor having a floating gate, a control gate, a source, and a drain, and wherein programming includes adding charge to said floating gate;
- allowing said floating gate to at least partially discharge;
- detecting when said floating gate has discharged at least a threshold amount;
- indicating, when said floating gate has discharged at least a threshold amount, that said memory array needs to be refreshed.
A memory device, comprising:
- a memory array, including a plurality of programmable semiconductor devices;
- a timing circuit, including a transistor having a floating gate, a control gate, a source, and a drain, said floating gate capable of storing charge;
- and
- a discharge detector in electrical communication with said timing circuit.
Dependencies are inferred from the claim text.