Sampled amplitude read channel for processing multiple data streams in a disc storage system
AssigneeCirrus Logic, Inc.
InventorsNeal Glover, Howard H. Sheerin
Life of this patent
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AssigneeCirrus Logic, Inc.
InventorsNeal Glover, Howard H. Sheerin
Estimating the term…
In a disc storage system employing multiple recording heads to increase throughput by providing simultaneous access through multiple data streams, a sampled amplitude read channel is disclosed for detecting, in parallel, estimated data sequences from the read signals associated with each data stream. Timing recovery in the read channel is implemented through interpolation, that is, by asynchronously sampling the analog read signals and interpolating to synchronous sample values. In this manner, a frequency synthesizer can generate a single reference clock for clocking operation of all the discrete time circuitry, thereby eliminating noise caused by multiple clocks as well as simplifying diagnostics. Furthermore, interpolated timing recovery avoids noise due to cross-talk between voltage controlled oscillators (VCOs) that would likely occur in a conventional synchronous sampling timing recovery design. A significant advantage is that the read channel can reside in a single integrated circuit.
A sampled amplitude read channel for detecting data recorded on a disc storage medium from a sequence of discrete time sample values generated by simultaneously sampling a plurality of analog read signals emanating from a plurality of read heads positioned over the disc storage medium, comprising:
A sampled amplitude read channel for detecting data recorded on a disc storage medium from a sequence of discrete time sample values generated by simultaneously sampling a plurality of analog read signals emanating from a plurality of read heads positioned over the disc storage medium, comprising:
Dependencies are inferred from the claim text.