Control circuit for bicmos bus drivers
AssigneeTexas Instruments Incorporated
InventorGerd Rombach
Life of this patent
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Abstract
The invention relates to a "power on demand" control circuit and the application thereof in a BiCMOS bus driver. The basic object resides in the creation of such a circuit with a low power need and a simple structure. This aim is to be solved by the provision of a control loop comprising a diode series circuit arrangement (D1, D2) and a bipolar transistor (Q2) between the collector and the base of the output transistor (Q1), which is of such a size that in the stable L state the base current of the outlet transistor (Q1) is so selected that the L state is maintained.
Claims6
A control circuit for controlling the base current of a first bipolar transistor (Q1) having a base, an emitter and a collector, said circuit comprising:
- a) a second bipolar transistor (Q2) with a base, an emitter connected with the base of the first bipolar transistor (Q1), and a collector connected with a first supply potential (VCC);
- b) a first resistor (R2) which is connected between the first supply potential (VCC) and the base of the second bipolar transistor (Q2);
- and
- c) a diode means (D1, D2) which is connected between the base of the second bipolar transistor (Q2) and the collector of the first bipolar transistor (Q1);
- d) said diode means (D1, D2) producing a voltage drop at the base of the second bipolar transistor (Q2), which amounts to at least the base-emitter voltages (Vbe1, Vbe2) of the first and of the second bipolar transistor (Q1, Q2);
- and
- e) said emitter of the first bipolar transistor (Q1) being connected with a second supply potential (VEE).
A BiCMOS bus driver comprising:
- a control circuit for controlling the base current of a first bipolar transistor (Q1) having a base, an emitter and a collector, said circuit comprising:
- a) a second bipolar transistor (Q2) with a base, an emitter connected with the base of the first bipolar transistor (Q1), and a collector connected with a first supply potential (VCC);
- b) a first resistor (R2) which is connected between the first supply potential (VCC) and the base of the second bipolar transistor (Q2);
- c) a diode means (D1, D2) which is connected between the base of the second bipolar transistor (Q2) and the collector of the first bipolar transistor (Q1);
- d) said diode means (D1, D2) producing a voltage drop at the base of the second bipolar transistor (Q2), which amounts to at least the base-emitter voltages (Vbe1, Vbe2) of the first and of the second bipolar transistor (Q1, Q2);
- e) said emitter of the first bipolar transistor (Q1) being connected with a second supply potential (VEE);
- f) a first NMOS transistor (N1) having a main current path thereof connected between the emitter of the second bipolar transistor (Q2) and the base of the first bipolar transistor (Q1) and which possesses a gate for receiving an input signal (IN);
- g) a second NMOS transistor (N2) having a main current path thereof connected between the base of the second bipolar transistor (Q2) and the diode means (D1,D2), and which possesses a gate for receiving the input signal (IN);
- h) a third NMOS transistor (N3) having a main current path thereof extending between a node placed between the first NMOS transistor (N1) and the base of the first bipolar transistor (Q1) and the second supply potential (VEE), and which possesses a gate for receiving the inverted input signal;
- and
- i) a first PMOS transistor (P2) having a main current path thereof connected in parallelism to the first resistor (R2) and which possesses a gate for receiving the input signal (IN).
Dependencies are inferred from the claim text.