Low power, high speed level shifter
AssigneeMicron Technology, Inc.
InventorsTodd A. Merritt, Troy A. Manning
Life of this patent
Estimating the term…
Abstract
A voltage level translator is disclosed which translates a CMOS input signal into a CMOS output signal where the low voltage level of the output signal is equal to the high voltage level of the input signal. The voltage level translator is described in an integrated circuit such as memory circuits, including DRAMs. Specifically, the voltage level translator produces an output signal which can be used as a gate voltage on a pre-charge transistor for a booted circuit where the gate voltage need only drop to the high voltage level of the input signal to shut the transistor off. The voltage level translator described, therefore, reduces the time and power required to translate an input signal by limiting the voltage swing of the output signal.
Claims10
A voltage level translator, comprising:
- an input connection for receiving an input signal having a first upper voltage level and a first lower voltage level;
- an input stage producing a first intermediate output and a second intermediate output;
- and
- an output stage producing an output signal in response to the input signal, the output signal being at the first upper voltage level when the input is at the first upper voltage level, and at a second upper voltage level which is greater than the first upper voltage level when the input is at the first lower voltage level, the output stage including:
- a first output transistor having its gate connected to the first intermediate output, its source electrically connected to the second upper voltage level, and its drain connected to the source of a second output transistor,
- the second output transistor having its gate connected to the second intermediate output, and its drain electrically connected to the source of a third output transistor,
- the third output transistor having its gate connected to the second upper voltage level and its drain electrically connected to the first upper voltage level, and
- an output line connected to the drain of the first output transistor.
An integrated circuit operating at a first voltage level provided by an external power supply, the integrated circuit comprising:
- an internal power supply providing a second upper voltage level which is greater than the first upper voltage level;
- an output line connected to an additional circuit;
- and
- a voltage level translator, the voltage level translator including:
- an input for receiving an input signal having a first upper voltage and a first lower voltage level, wherein the first upper voltage is substantially equal to the first voltage level,
- an input stage producing a first intermediate output and a second intermediate output;
- and
- an output stage producing an output signal in response to the input signal, the output signal being at the first upper voltage level when the input is at the first upper voltage level, and at the second upper voltage level when the input is at the first lower voltage level, the output stage including:
- a first output transistor having its gate connected to the first intermediate output, its source electrically connected to the second upper voltage level, and its drain connected to the source of a second output transistor,
- the second output transistor having its gate connected to the second intermediate output, and its drain electrically connected to the source of a third output transistor,
- the third output transistor having its gate connected to the second upper voltage level and its drain electrically connected to the first upper voltage level, and
- an output line connected to the drain of the first output transistor.
Dependencies are inferred from the claim text.